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  • FPGA designs for portable test gear

    Charlie Jenkins, Altera -- Test & Measurement World, 3/1/2007 2:00:00 AM


    The full Web-exclusive version of this article includes design metrics related to the PRP, recommendations for preserving software investments, and an application example involving automotive noise, vibration, and harshness (NVH) test.

    Traditionally, T&M OEMs have designed instruments to perform test procedures based on a specific standard, so they have been forced to redesign their products whenever a new or revised standard is published. Now, vendors are looking to make their communications testers, semiconductor ATE, and general-purpose test instruments more flexible so they can adapt to changing specifications. At the same time, customers are looking for test equipment that is more portable to increase productivity and reduce capital expenses.

    Field-programmable gate arrays (FPGAs) may provide the answer to both needs. FPGAs continue to make inroads into the growing universe of portable gear. A single FPGA design can support many feature sets, and FPGA-based portable test gear is field-upgradeable to accommodate new test standards. An FPGA can implement the functionality of portable-test-device components such as CPUs, display drivers, keypad interfaces, and generic I/O ports. Specific designs can augment common functions with unique elements such as digital-signal processing (DSP) blocks. Reprogramming an FPGA takes care of required variations in functions such as display size and resolution and number of keys.

     
    The portable reference platform (PRP) comprises a software processor development board, display touch panel board, and VGA video output board.


    A good starting point is a portable reference platform (PRP) from an FPGA vendor (figure). Such a platform helps you evaluate software productivity tools, embedded processors, and system-on-a programmable-chip (SoPC) design tools for embedding LCD, touch-panel, and CMOS imaging IP cores in an FPGA. Also, IP blocks such as hardware acceleration and image edge detection are included to give designers an understanding of the FPGA's DSP and coprocessing capabilities.

    The full Web-exclusive version of this article includes design metrics related to the PRP, recommendations for preserving software investments, and an application example involving automotive noise, vibration, and harshness (NVH) test.

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