Subscribe to Test & Measurement World
RSS
Reprints/License
Print
Email
Average Rating:
  • (0)
    Rate this:
  • Test Ideas: Isolate your clock source

    Isolating a clock between an oscillator and a load minimizes noise and other interference.

    By Daniele Danieli, EUROCOM-PRO, Venice, Italy -- Test & Measurement World, 11/1/2008 2:00:00 AM

    pdf button



    Circuits such as PLL (phase-locked loop) synthesizers, high-dynamic-range ADCs (analog-to-digital converters), and timing-sensitive digital networks require a stable and spurious-free clock. Testing these circuits is often difficult if you use a master oscillator, even if the oscillator's signal meets the application's requirements for phase noise and spurious response. Variable clock-line loads and power-supply line interference—typical in the open-board environment on a lab bench—can degrade signal purity with jitter or unpredictable phase steps.

    Have a test idea you'd like to share? Publish it here and receive $150. Send us your ideas.

    Read other Test Ideas.
    Read Design Ideas published by EDN.

    Insulating an oscillator from a load often requires a high reverse-attenuation buffer stage, which is difficult to implement at frequencies of 10 MHz and above. The circuit (click to go to figure) provides an isolated clock source using a high-speed optocoupler with low input-to-output capacitance. Isolating a clock source from its load eliminates ground loops that can introduce noise.

    The circuit uses a quartz oscillator with two NPN transistors (Q1, Q2) that condition the oscillator's signal to TTL levels. The circuit also provides sufficient drive current for the optocoupler. The values of capacitors C3 and C4 are based on frequency. For example, at frequencies from 15 MHz to 30 MHz, you should use 220 pF for C3 and 100 pF for C4; scale up the values for lower frequencies.

    The output of transistor Q3 will be a TTL-compatible signal. Select a value for resistor R7 to get the best pulse response. For most applications, you can use 22Ω, but you can often omit R7 as well.

    Having created a TTL-level signal, you can apply it to the input pin of IC2, which is a high-speed CMOS optocoupler such as the HCPL-7101, for frequencies up to 40 MHz. The HCPL-7101 provides an effective isolation from load conditions and electromagnetic interference.

    The oscillator circuit and input side of the optocoupler use a dedicated battery to obtain the 5-V supply voltage. By using a battery, you won't add power-supply noise to the circuit. You can then connect the optocoupler's output side directly to your board under test—even with relatively long cables—without loading the oscillator stage. You can use any optocoupler of adequate bandwidth. Just make sure that your VCC voltage (regulator output) is compatible with the input-voltage specification for IC2.



    A high-speed optocoupler isolates a TTL-level clock source from ground loops and noise.
    Average Rating:
  • (0)
    Rate this:
  • RSS
    Reprints/License
    Print
    Email
    Talkback
    Similar Content from T&MW

    No related content found.

    • 0 rated items found.

    Datasheets.com Electronic Parts & Inventory Search

    185 million searchable parts
    • Part Number
    • Description
    • Inventory
    • Products
    • Manufacturers
    Canon Resource Center

    Featured Company


    Most Recent Resources

    Featured Job On
    Scroll for More Jobs
    Advertisement
    More Content
    • Blogs
    • Webcasts

    Sorry, no blogs are active for this topic.

    » VIEW ALL BLOGS RSS
    • All


    Advertisement
    Advertisement
    About Us   |   Advertising Info   |   Site Map   |   Contact Us   |   FREE Subscription
    © 2011 UBM Electronics . All rights reserved.
    Use of this Web site is subject to its Terms of Use | Privacy Policy

    Feedback Form
    Feedback Analytics