Parallel parametric test goes asynchronous
Rick Nelson, Chief Editor -- Test & Measurement World, 5/1/2007 2:00:00 AM
Parallel test is a surefire method for speeding up production, and asynchronous parallel test has long been known as an effective way of significantly improving through-put while making the most of your existing test hardware (Ref. 1). What’s new is the application of parallel techniques to semiconductor parametric test applications.
Keithley Instruments pioneered the concept in the form of a synchronous parallel test capability and has published a book—reviewed on p. 22 of this issue—that discusses the benefits of parallel parametric test, provides hints on how to apply the technique to legacy devices, and describes how to design new test structures to take full advantage of the parallel-test capability.
In December, Keithley released version 5.2 of the KTE Interactive Test Environment software for the company’s Series S600 Parametric Test System. KTE V5.2 includes a routine called PT_Execute, which allows quick evaluation of parallel versus serial test. The company also added a feature called FMI (for force-measurement interlock), which employs firmware and software to reduce crosstalk, noise, and measurement variability in parallel test applications.
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In this three-threaded application, Agilent’s SPECS asynchronous test scheduler (top) aims to squeeze out some of the measurement dead time (highlighted in yellow) left by synchronous tests (bottom) of transistors TR1 to TR6, resistor R, and capacitors C1 to C4. |
Now, Agilent Technologies has upped the ante by introducing asynchronous parallel parametric test capability with the April launch of its 4080 Series parametric test platform. The new system employs what Agilent calls the SPECS (Semiconductor Process Evaluation Core Software) test shell to support both synchronous and asynchronous parallel test.
According to Alan Wadsworth, marketing manager for Agilent’s Hachioji Semiconductor Test Division, the 4080 parametric test platform is designed to serve wafer fabs running advanced processes, including those extending down beyond 45 nm, for which engineers need extensive data to contend with issues such as linewidth variation. Apart from the system’s parallel test capability, Wadsworth noted that the 4080 Series has a more powerful CPU than does its 4070 Series predecessor; the new CPU alone, he said, boosts throughput of legacy serial test programs transferred from 4070 systems by 10 to 20%.
But the real gains come from developing programs that take full advantage of the 4080’s asynchronous parallel test capability: Parallel asynchronous test can decrease test times by up to 50% over conventional sequential test methods, Wadsworth said. Asynchronous mode, he added, aims to squeeze out some of the measurement dead time left by synchronous-parallel-test approaches (figure).
The 4080 comes in three models: the 4082A performs general-purpose parametric test, the 4082F targets flash-memory-cell parametric test for NAND/NOR devices, and the 4083A includes a 20-GHz 8x10 RF matrix to measure up to five RF structures in a single touchdown.
| REFERENCE |
| Mazza, Ed, “Asynchronous Testing Increases Throughput,” Test & Measurement World, December 2000. |
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