Integrating boundary scan into ATE channel cards
David Sigillo, US General Manager, Seica -- Test & Measurement World, 3/1/2006 2:00:00 AM
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For details on boundary scan's evolution to this point and on the application of JTAG access to ATE channel cards, read David Sigillo's article, "Boundary scan test: encapsulation or integration?". |
The success of IEEE 1149.1 boundary scan might suggest that you could toss your ATE and fixtures and replace them with a PC, a boundary-scan control card, and the four-wire Test Access Port (TAP). Indeed, boundary scan offers a simple, low-cost tool for quickly testing the structural integrity of a board prototype, for debugging hardware, and for verifying embedded software.
But this lab-oriented approach becomes insufficient for production test. Boards often include non-JTAG components, and it's wise to use ATE to test for shorts before you power up your board under test. Finally, JTAG remains a serial test technique, and even at speeds of 30 MHz and more, JTAG-based programming operations can be excessively long.
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| ATE systems whose channel cards have embedded JTAG circuitry can seamlessly apply serial boundary-scan and conventional parallel tests. |
Approaches that move beyond JTAG-only production tests include a "dual test strategy," which employs a conventional in-circuit test stage followed by a JTAG benchtop stage, but this two-stage, divide-and-conquer approach imposes high costs.
Another approach is to encapsulate JTAG test capability within a conventional ATE system. That approach, however, suffers from limitations with respect to operations such as checking continuity between JTAG and non-JTAG components. Stand-alone JTAG controllers in a lab can do such checks, but they loose that ability when encapsulated in the ATE.
An alternative approach is to employ ATE channel cards with embedded JTAG circuitry so that either the base ATE controller or a JTAG controller can control each channel. With this approach, the JTAG controller sees the channel cards as a chain of interconnected JTAG components, which it would commandeer seamlessly to perform boundary-scan tests.
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