Chassis layout is key to success with PXI Express
By Richard A. Quinnell, Contributing Technical Editor -- Test & Measurement World, 11/1/2008 2:00:00 AM
With the electronics industry's never-ending appetite for speed, the bandwidth advantages of PXIe (PXI Express) are becoming increasingly important for test instrument designs. To take full advantage of the capabilities offered by this technology, you'll need a chassis designed to handle PXIe cards.
 Smaller PXIe enclosures such as the GX7600 offer hybrid slots that provide a growth path for PXI system developers. Courtesy of Geotest. |
You could work with a manufacturer to design a custom card cage for your application, or you could turn to a commercial chassis offered by companies such as National Instruments (NI) and Geotest. Either way, you'll need to understand the connection architecture of the system backplane and then position the modules to maximize bandwidth usage.
The place to start is by recognizing the fundamental characteristics of PCI Express, the serial bus that provides PXIe its bandwidth. PCI Express provides system elements with a point-to-point serial connection composed of multiple lanes, each of which has both send and receive channels operating at 2.5 Gbps. Designers can scale the performance of PCI Express connections to meet performance needs by grouping lanes together; configurations of x1, x4, x8, and x16 lanes are common. Because the lanes run point-to-point, their data bandwidth is dedicated to the connection, not shared with other connections in the system.
Compatibility is key
A key component of the PCI Express bus is its compatibility with traditional PCI. Anything that can connect to the PCI bus can connect through a bridge chip to a PCI Express bus without any software changes. The bridge chip handles all the mapping of transactions across a shared parallel bus onto a dedicated serial bus. This software compatibility ensures that PCI and PCI Express elements can work together in a system as though they were all on the PCI bus.
When adapting PCI Express for the PXIe specifications, the PXI Systems Alliance (PXISA) sought to take advantage of this ability to interoperate in order to help developers preserve their investment in PXI modules. The PXIe specification calls for the PXIe system controller to communicate with PXIe modules as well as through a bridge to a standard PCI-based PXI bus. In addition, the specification defines a hybrid module slot that accepts either PXI or PXIe modules. These two definitions ensure that developers can mix traditional PXI and new PXIe modules in the same system without software changes.
The specification does not, however, define how many of each type of module slot—PXI, PXIe, or hybrid—a system enclosure must contain, nor does it specify the arrangement of slots beyond the locations for the system controller and system timing module. These choices are left open for developers to make as needed, and many custom configurations are thus possible. In their commercial PXIe system enclosures, Geotest and NI have already made those choices for you, but you still need to pay attention to how you position your modules to make the most efficient use of bandwidth.
Small cages ease development
Geotest offers a nine-slot hybrid PXIe enclosure, the GX7600, that provides five PXI slots, two hybrid slots, a PXIe controller slot, and a PXIe system timing slot. The backplane supports a x4 lane connection from the system controller to each hybrid slot as well as the system timing slot. It also has a x1 lane connection to a bridge chip that drives the five PXI slots. NI has a similar, eight-slot enclosure, the NI PXIe-1062Q, that offers only four PXI slots but otherwise offers the same connections as the GX7600.
The relative simplicity of these small enclosures means that there is only one positioning issue to keep in mind. The hybrid slots replace the PXI J2 connector that carries a PXI local bus with a different connector to carry the PXIe bus. PXI cards that use the local bus and J2 connector thus cannot be located in a hybrid slot.
Modules that do not have a J2 connector, however, can be positioned anywhere in the chassis, which makes these chassis good candidates for developers who are just beginning to need the PXIe bandwidth or who see PXIe needs looming but not yet present. The hybrid slots provide a growth path for eventual adoption of PXIe: You can use PXI modules for the present design and then replace them with higher-performance PXIe modules without having to change software or modify the system configuration.
Positioning modules in larger PXIe chassis
In addition to its small hybrid enclosures, NI has introduced two 18-slot PXIe enclosures: The NI PXIe-1065 provides a PXIe system controller slot, four hybrid slots, four PXIe slots (including the system timing controller), and nine PXI slots; the NI PXIe-1075 has no pure PXI slots, offering one controller, nine PXIe, and eight hybrid slots.
 Even developers with no current need for PXI Express can benefit from properly positioned cards in a PXI Express cage because of the split PXI bus that enclosures such as the NI PXIe-1065 offer. Courtesy of National Instruments. |
Connections for the 18-slot enclosures are somewhat more complex than for the smaller configurations. The NI PXIe-1065 breaks the PXI bus into two segments. One contains five PXI slots and a hybrid slot while the other contains four PXI slots and three hybrids.
The first segment has a x1 direct link to the system controller, while the second shares a switched x4 link to the controller with two PXIe slots. The NI PCIe-1075 uses four switches on its backplane. This organizes the hybrid slots into two four-slot PXI segments and the PXIe slots into two additional groups, each collection sharing a x4 link to the controller.
This type of grouping and use of switches creates pathway restrictions that impact the data bandwidth and inter-module connectivity available at any given slot. The way you position modules in a PXIe enclosure, therefore, can affect the data throughput of a system. For instance, the presence of two independent PXI buses in the 18-slot cage allows you to bypass a bottleneck when two groupings of PXI modules require high bandwidth in order to transfer data back and forth. If all the modules are located on a single segment, the groups must share the PXI bus. If the two groups are located on different segments, each grouping has sole access to its segment's bandwidth.
Because the links from the segments to the system controller are also independent, the effect is like having two small independent systems that share common clock and trigger functions. The enclosure thus offers a system performance boost to developers not using PXIe at all.
Switches offer opportunities
When positioning modules in the PXIe slots, developers should pay attention to the location and nature of the switches on the backplane. In the PXIe-1075, for instance, each switch serves to connect the system controller and four or five other connections using x4 links to the PXIe slots or a x1 link to the PXI bridge. These switches force the PXIe modules that connect to them to share the link bandwidth. You will get maximum performance, therefore, if you use separate switches to isolate high-demand module groupings from one another.
You should be aware that the PXIe links in the cages currently available from NI and Geotest are limited to x4 configurations. Yet, some high-performance PXIe modules offer x8 connections to achieve maximum performance. The specifications allow the system controller to provide up to 24 PCI Express lanes configured as a x16 link and a x8 link or as multiple clusters of fewer lanes with the same total. Thus, the PXIe specification supports the x8 connections of such modules, but the currently available commercial backplanes do not. To gain this top performance, you will need custom backplanes for your enclosures.
When creating custom backplanes, you will need to partition the available links while bearing in mind how data flows within the system. Fortunately, you have a wide range of options for developing dedicated and shared-bandwidth connections. Switches, for instance, provide a means of distributing one link from the system controller slot to multiple module slots. The slots will have to share the bandwidth of the link to the controller, but they may not need to share bandwidth for connections among them. Nonblocking switches can provide independent pathways among ports, so two ports can link together and not share bandwidth with a similar linking between two other ports on the same switch.
The key, however, is to recognize the opportunities as well as the restrictions that a specific PXIe backplane configuration offers. An ad hoc insertion of modules into the enclosure can create performance obstacles. By positioning modules within the enclosure appropriately, however, you can maximize the performance attainable, making the most out of PXI Express.
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