Integration paces point-tool development
By Rick Nelson, Chief Editor -- Test & Measurement World, 6/1/2006 2:00:00 AM
A panel at the 2006 VLSI Test Symposium held May 1 in Berkeley, CA, explored the future of design for test (DFT). The primary question was whether point tools or integrated DFT environments are best, reports Ron Wilson, executive editor of our sibling publication EDN (Ref. 1). Panelists representing companies including Cadence Design Systems, Mentor Graphics, Synopsys, SynTest, and Virage Logic agreed that integration would be essential to link DFT with design tools, diagnostics tools, design-for-manufacture tools, and ATE.
Wilson reports that panelist Sanjiv Taneja, VP for the Encounter Test product line at Cadence, commented that the EDA industry started as a collection of point tools that have evolved to fit within an all-encompassing architecture.
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| Talus LX and PX, which target logic and physical design, respectively, combine to implement the functions shown here. Additional components will target design for manufacturability and yield learning. Courtesy of Magma Design Automation. |
An all-encompassing architecture that addresses design, test, and yield is the goal of Magma Design Automation. The company targets the rapid design of ICs fabricated in 65-nm and smaller process geometries with its Talus platform, which the company describes as a lithography-aware implementation flow from RTL to tape-out. Now in beta release, Talus addresses timing, area, power, signal integrity, DFT, and manufacturability, according to Behrooz Zahiri, a senior marketing director at Magma.
When I asked Zahiri about the technology, he told me that increased automation is one of the key features of Talus. He described previous EDA methods as "electronic design assistance," with significant scripting and other efforts required to tie together DFT, built-in self-test (BIST), wireload modeling, floor planning, and a host of other functions that might exist as point tools. Such manual approaches become untenable, he said, as investments rise from $5 million per design at 130 nm to potentially $50 million or more at 45 nm.
Zahiri said that initially, Talus is available in two versions: Talus LX and PX, which target logic and physical design, respectively. Additional enhancements, he said, will target manufacturability and yield learning. More details, he said, will be available at the Design Automation conference (July 24–28, San Francisco, CA).
But despite efforts to combine design, test, and yield functions into a single flow, alternatives continue to emerge. For example, Stratosphere Solutions has just debuted its StratoPro platform, which, according to Prashant Maniar, chief strategy officer, is part of an effort to "build differentiated technology that meets a focused market demand"—in this case, alleviating yield fallout caused by parametric variability. And Incentia Design Systems recently released a new version of its TimeCraft software, designed to improve the accuracy and efficiency of static timing analysis for 90- and 65-nm designs.
Ultimately, the trend toward integration is inexorable, but so is the emergence of new tools that address problems occurring on leading-edge processes.
| REFERENCE |
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EDA gains larger role in test arena
12/22/2004Design for life
05/31/2004Differentiation is key to EDA
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