It's no longer hit or miss with DSP simulators
Lori Vidra, Product Manager, Software Development Systems Group, Texas Instruments -- Test & Measurement World, 5/1/2004 2:00:00 AM
| Simulation Fulfills its Promise for Enhancing Debug Analysis |
Improvements in the speed and capabilities of simulation tools can help you reduce time-to-market substantially. Waiting for a hardware prototype to begin application tuning has become a thing of the past: DSP vendors' simulators no longer run several orders of magnitude slower than the systems they mimic, so you no longer need to run simulations overnight, waiting until morning to view results. And once prototypes are available, the work you've done with simulations will speed both the test and manufacturing processes.
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A simulation tool automatically gathers cache data and graphically displays cache hits and misses, allowing you to optimize your code. Courtesy of Texas Instruments. |
Many simulators can collect and visualize data that cannot be observed in hardware. In addition, simulators are easy to use, and they are highly repeatable, since they can endlessly run the same algorithm in exactly the same way as you tweak your design. This repeatability distinguishes simulators from emulators, because external events like interrupts are almost impossible to precisely repeat with emulation hardware.
The DSP Analysis Tool Kit recently introduced by TI as part of its Code Composer Studio Integrated Development Environment demonstrates such tools' analysis capabilities. The kit's on-chip cache analyzer, for example, provides a graphical representation of cache accesses, highlighting cache hit-and-miss patterns over time (see figure). With such information, you can tune your code to minimize cache misses to obtain the best performance.
To learn how to apply simulation tools (such as pipeline-stall and code-coverage analyzers and a multi-event function profiler) at all stages of your development flow, see the complete version of this article at www.tmworld.com/DSP_sim.
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