Goepel model library expands support for Infineon and ARM CPUs
-- Test & Measurement World, 8/4/2009 9:00:00 AM
Goepel electronic has developed dedicated model libraries for both Infineon XC16x processors and ARM Cortex-M3 processors that support the company's VarioTAP in-system emulation technology. The libraries, described as VarioTAP models, are structured modularly as intelligent IP and enable a complete fusion of boundary-scan test and JTAG emulation.
Through the use of this technology, embedded and external flash memory can be programmed in-system via the native processor function. What's more, VarioTAP supports interlaced bus emulation tests and system emulation tests for extended JTAG/boundary-scan functionality.
The VarioTAP models for the Infineon XC16x and ARM Cortex-M3 processors have been developed in cooperation with Testonica, which recently joined Goepel's GATE partner program. They not only enable flash programming and numerous emulation test functions, but also accommodate all possible scan-chain configurations.
All the new VarioTAP IP models are supported under Goepel's System Cascon JTAG/boundary-scan development environment, beginning with Version 4.5, and are activated by the license manager. System Cascon currently offers more than 40 integrated ISP, test, and debug tools.
Goepel electronic, www.goepel.com.
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