High-performance computing speeds image data processing
Ann R. Thryft, Contributing Technical Editor -- Test & Measurement World, 2/1/2010 12:00:00 AM
The amount of image data generated in some machine-vision applications is growing rapidly as camera resolutions increase, panels and wafers get bigger, and the features to be inspected shrink even further. In semiconductor wafer and mask inspection, as well as in FPD (flat-panel display) inspection, the board-level or multi-board vision processors and blade servers traditionally used to process this data are running out of steam.
Some vendors of vision processors, such as Matrox Imaging, are creating systems that build upon HPC (high-performance computing) architectures to process the growing data that must be handled as it comes into the system via an external interface adapter and moves among multiple processors.
Larger wafers mean more data
In semiconductor inspection, wafer sizes are moving from 150 mm to 300 and even 450 mm, while at the same time the features on the wafer that must be examined are shrinking, said Pierantonio Boriero, product line manager for Matrox Imaging. "3-D x-ray systems can generate 0.5 Tbytes to 9 Tbytes per scan," he said. "Compounding the challenge is the increase in dynamic range from 8 bits to 12 bits per pixel."
In the FPDs manufactured today, the substrate glass measures 2.16x2.4 m, so there are roughly 80 Tbytes of data to inspect per panel. In the near future, the imaging of larger panels, with substrate glass measuring 2.88x3.13 m, will result in about 140 Tbytes of data per panel.
"Not only is this an enormous volume of pixels to inspect, but throughput must remain high, since this is in-line processing equipment," said Boriero.
Traditional vision-processor boards were based on a DSP (digital signal processor) or a microprocessor and also included custom ASICs for the image processing, said Boriero. "With a single expansion board that performed all the necessary data-acquisition and processing functions, increasing the processing power was a problem because of the much higher power consumption and heat-dissipation levels," he said.
Blade server systems do offer greater computational power per processing node but suffer from limited I/O bandwidth between blades, commonly provided by Gigabit Ethernet and sometimes Infiniband. They also lack a spare slot for a frame grabber or other specialized I/O expansion board, resulting in inadequate external I/O expansion for getting data into and out of the whole system.
"We could have solved the problem by employing multiple host PCs with vision-processor boards, but that would exceed most production floor space requirements," Boriero explained. He added, "Once we got beyond what one board or one standard PC can do, we started thinking about multiple processors running concurrently, sharing data among them all via a switched-fabric backplane. That's when we looked at high-performance computing, which is a broad concept of how to make multiple computer systems work together."
The Matrox Supersight system, which consists of up to four system host boards in one box with a high-speed fabric interconnect, tailors HPC technology for image-processing applications. The rack-mounted system includes a PCIe (PCI Express) 2.0 backplane, quad-core Intel Xeon CPUs for image processing and analysis, FPGAs for image preprocessing, and GPUs (graphical processing units) for accelerated image processing.
To maximize computing resources by increasing I/O throughput, Matrox chose PCIe x16 Gen 2, at 8 Gbytes/s bidirectional, to interconnect boards and nodes within the system, said Boriero. The PCIe switched-fabric backplane is packet-based, so it enables developers to segment the data and move it around more efficiently among the different processing elements. "Developers can create clusters, or little work groups made up of different technologies, each working on a portion of the data set," he said. The point-to-point, full-duplex nature of PCIe lets developers isolate bus traffic within the compute clusters, which helps optimize performance, especially as the number of processing elements increases.
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