Solving accessibility issues
Embedded instrumentation is the answer to these problems.
By Sujan Sami Industry Manager Measurement & Instrumentation Practice Frost & Sullivan, www.frost.com -- Test & Measurement World, 6/1/2010 12:00:00 AM
Test equipment such as in-circuit testers and manufacturing defect analyzers have successfully met end-user requirements in the past, but they are less successful at accessing the data points on today's complex smart chips. Some of the complicating factors include:- the lack of test access for signal-integrity testing,
- the migration to chip-interconnect speeds in excess of 5 Gbps, and
- the need for protocol-aware, high-speed I/O test.
Vendors, therefore, need to develop better solutions for measuring and testing devices. Embedded instrumentation is the answer to these problems.
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Two emerging standards are expanding the possibilities of embedded instrumentation: IEEE 1149.7 and IEEE P1687. IEEE 1149.7 describes circuitry that can be added to an IC to provide access to Test Access Ports defined in IEEE 1149.1 (JTAG). IEEE P1687, or Internal JTAG, is expected to leverage the infrastructure defined in IEEE 1149.1 to access and control on-chip test circuitry. These standards are expected to enhance the use of embedded instrumentation in the near future for testing and validating 3-D multiple-die chip packages, which some predict will become a prevalent technology and allow the industry to keep up with Moore's Law in the future.
The IEEE 1149.7 standard is adaptable to TSVs (through-silicon vias), which are essential for 3-D die-stacked chips. Enhancements to IEEE 1149.7 over IEEE 1149.1 also make it effective for testing and validating 3-D chips. With access provided to embedded instrumentation by IEEE 1149.7 and IEEE 1149.1, the IEEE P1687 standard can manage and control those instruments and facilitate the correlation of the test results.
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Although the boundary-scan test equipment market registered revenues of only $28.8 million in 2008, this represented an increase of 8.6% over 2007. The compound annual growth rate for this market is expected to be 8.5% from 2008 to 2013.
As manufacturers remain concerned about capital expenditures in this downturned market, one benefit of boundary scan is its fairly low entry cost—a tester costs in the $10,000 to $40,000 range. Boundary scan is also less expensive than older probe-based technologies because it is more software oriented.
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Foundry revenue gains to outperform semiconductor industry gains in 2010 Things are looking up for foundries. With foundry revenue expected to grow by nearly 40% in 2010, revenue expansion in the foundry business is forecast to outperform that of the semiconductor industry this year, according to a recent report from iSuppli, which estimates pure-play foundry suppliers will see revenues in 2010 increase 39.5%.
Suzanne Deffree, Managing Editor, News, EDN
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