From back end to front end
NVIDIA's GPUs are front-end devices often designed into consumer products.
By Martin Rowe, Senior Technical Editor -- Test & Measurement World, 7/1/2010 12:00:00 AM
Daniel Chow is a signal-integrity engineer at NVIDIA (Santa Clara, CA), a maker of GPUs (graphics processing units) found in desktop, laptop, and tablet computers; cellphones and other consumer devices; and supercomputers. Prior to NVIDIA, Chow worked at FPGA-maker Altera and was featured in "The philosophy of jitter" in the June 2009 issue of T&MW. Senior technical editor Martin Rowe spoke with Chow by telephone.
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Q: How do test and measurement differ for FPGAs and GPUs?
A: Altera's FPGAs are designed into back-end systems such as switches and routers. They have long lifetimes, as much as 10 years. An FPGA's architecture may carry over from one product design to another. Thus, I've had to learn in detail how they work.
NVIDIA's GPUs are front-end devices often designed into consumer products. A GPU architecture may be in production for just two to three years. I usually spend time validating a new design for signal integrity, power integrity, and crosstalk—system-level effects that are challenging to verify through simulation.
Q: How do you perform measurements on FPGAs as opposed to GPUs?
A: You can program an FPGA to create specific conditions and tests. All you need is a power supply, a programming port, and connections to measure signals. For example, you can program an FPGA to perform a loopback test on a high-speed serial port and you can measure jitter under controlled conditions such as PRBS (pseudorandom bit sequence) patterns. You can't do that with GPUs. They operate as part of a larger system where they run live traffic only.
Q: How do you evaluate signal and power integrity?
A: It's much more difficult. My primary concern is how a device interoperates within a system. Sometimes, I can set up test points at a device's ports to measure signals at the device. A GPU's test and measurement emphasis is in interoperability, where an FPGA's emphasis is performance, because you don't know how customers use FPGAs.
Q: If you're testing with live traffic, can you get repeatability in your measurements?
A: Live traffic is, over a period of time, essentially random, and random conditions become Gaussian. Deterministic jitter begins to fade when you don't have a repeating pattern the way you can when using defined patterns. I have to use statistical methods such as the central limit theorem to model the various jitter components.
The problem with testing with live traffic is the number of bits involved. A typical 1280x1024 image with 24 bits of color per pixel contains more bits than an oscilloscope can analyze. Even if you repeatedly send an identical image through the processor, effectively making it motionless, an oscilloscope will have difficulty processing such a long pattern, and you can't characterize it. Bit-error-rate testers have less stringent limits on pattern length, but they have difficulty with very long, arbitrary (non-PRBS) patterns.
Q: What, then, do you do?
A: We look at jitter on a macro scale. We have to look at jitter as no longer purely random nor deterministic. Even random jitter is not truly random because power supplies are heavily filtered, so they remove some of the jitter. We're working on analysis techniques for these signals, and we hope to produce conference papers on the topic soon.
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