Strong rebound for semiconductor test (continued)
A continuation of our interview with Mark Jagiela, president of Teradyne Semiconductor Test Division, which appeared in the September 2010 Viewoint column.
By Larry Maloney, Contribution Editor -- Test & Measurement World, 9/1/2010 12:00:00 AM
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Q: Which of your test segments-SOC or memory-is recovering the fastest?
A: SOC has recovered dramatically and rapidly. Orders in May for the industry as a whole for SOC test equipment had climbed not quite back to the peak levels of 2004 or 2005 but certainly exceeded peaks for 2006 and 2007. So, it's been a very big rebound. On the other hand, there's been a bit of a turnaround in orders for test equipment for memory, but orders are still nowhere near the peak orders of the 2004 to 2007 period.
The two primary drivers of memory are DRAM and NAND flash, and the small group of companies that manufacture these chips have been very innovative and productive in the use of their existing capital equipment and have come up with more design-for-test solutions to reduce tests.
Q: What market niche are you targeting with your new Neptune tester?
A: This product, which falls under Teradyne's Systems Test group, is designed to test hard-disk drives for computers and DVRs, a market with tremendous volumes. There are big challenges involved in test, because these 2.5-in. drives need to perform reliably in environments that include heat and vibration. In designing Neptune, we drew from our expertise in developing high-throughput parallel testers. The result is a system that can test over 5000 disk drives in parallel. It's been a very successful, fast-ramping introduction.
Q: The Teradyne ETS-88 semiconductor tester won Test & Measurement World's Test Product of the Year award for 2010. What are the key features that make this new tester significant?
A: This product has its roots in Eagle Test, a company that Teradyne acquired in 2008 for its expertise and solid reputation in analog test. The ETS-88 is an economical tester with a compact footprint and a modular design that allows from one to four test quadrants. Depending on the configuration, the tester supports from 32 to 128 digital pins and 72 to 288 analog pins. Quadrants can be linked for multisite testing, with parallel test efficiencies approaching 100%.
This product includes hardware and software features for testing devices in turret handlers with multiple sockets. With this capability, which we call index parallelism, you can fully test a device in just 0.25 s.
This product is off and running and has opened up new markets in such areas as power management and catalog linear devices. Such discrete devices are part of a very large market, and a lot of these ICs are still being tested in very old, single-site testers.
Q: Any other new products that you would like to mention?
A: Our approach is to create platforms that we can refresh with new instruments over time to give more capability to our customers. We've been doing that consistently with our UltraFLEX line. In the past year, for example, we've introduced a lot of new options. In addition, our Nextest line has introduced the Magnum 2x for memory test.
The legacy of Nextest, which Teradyne acquired in 2008, was always to innovate around a very modular, low-cost approach to testing memory. The Magnum 2x can test more than 1280 devices in parallel. An eight-chassis configuration offers up to 10,240 pins.
This product is not only the marquee tester for doing extreme parallel test for memory, but it also delivers the frequency performance to test multichip modules that stack flash and DRAM in the same package. You can also take that same Magnum 2x and apply it to DRAM probe test.
Q: What synergies exist among the various Teradyne test equipment divisions?
A: A good example was development of the Neptune tester for hard-disk drives. For that product, we definitely leveraged a lot of engineering knowledge-mechanical, electrical, and software-across Semiconductor Test Systems and the Systems Test division, which traditionally has targeted such applications as circuit board test, test solutions for military and aerospace, and diagnostic solutions for automotive.
Q: What's the nature of your new partnership with Teseda?
A: Teradyne signed an exclusive development agreement with Tesada to produce Scan Workbench, a next-generation portable scan-debug and yield-development tool. Based on industry-standard data protocols and the existing Tesada Workbench and Diagnostic Manager products, Scan Workbench will allow engineers using our testers to perform rapid silicon debug, design validation, failure analysis, and yield monitoring.
The tool gives engineers immediate feedback on what's wrong, versus having to go offline. Do I have a device design problem, a fab problem, or a yield problem? This tool helps answer those questions. You can also find failure patterns by analyzing aggregated debug data of scanned vectors across multiple devices from a wafer or a specific lot of wafers. All of this is very important in meeting critical time-to-market goals.
Q: From a geographic standpoint, which regions will be setting the pace for Teradyne semiconductor test orders over the next few years?
A: The trend in semiconductor test is that the facilities to test devices are located somewhere in Asia. So we ship most of our testers-more than 70%-to factories in Asia. Many of those facilities are owned by the companies that designed the device, so Teradyne often works with engineers in Europe or the US to get the testers designed or configured to meet their needs, even though the equipment is eventually installed in Asia.
In other cases, we are shipping our testers to outsourced assembly and test houses. These companies have a special need for flexible test systems that meet the changing needs of various customers. We are addressing that concern with such products as our UltraFLEX line.
Q: Looking ahead, is it possible to avoid the boom and bust cycles that have traditionally affected the semiconductor industry? Do you expect to see more consolidation in semiconductor test?
A: There is really no way to mitigate these cycles. They are a fact of life, and you must manage your business accordingly. We know we will have periods of rapidly growing demand, as we have now, when our profits are strong, as well as downturns where we lose money. The goal is to be able to assure your shareholders of a good return on their investment over time.
As for the issue of consolidation in the semiconductor industry, much of it has already occurred. There are now only three major players-Teradyne, Advantest, and Verigy-and there is considerable overlap in products and markets. What is available now, as far as acquisitions are concerned, is primarily limited to small, niche companies.
Q: How about further progress in squeezing the cost of semiconductor test?
A: That, too, has pretty much run its course. The test piece of the semiconductor ecosystem is relatively small. Back in the 1980s, the cost of test accounted for about four cents of every dollar in semiconductor revenue. So, if you sold a device for a dollar, you needed to take four cents from that sale to set aside for your capital equipment budget for test.
Now, the test cost has dropped from four cents to two cents, which has allowed companies to show greater profitability or to make greater investments in other areas, such as fab processes or semiconductor packaging. But I believe that we have squeezed the test part of this equation about as far as we can.
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