How to tame high-speed systems
An exclusive interview with a technical leader.
Larry Maloney, Contributing Editor -- Test & Measurement World, 6/1/2011 12:00:00 AM
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A: It’s the ever-increasing demand for greater bandwidth for both commercial and consumer applications. Look at the Website of any company, and you’re likely to see more and more videos for product demos. You also see tremendous growth in high-speed data transmission from large server centers. Wireless mobile applications are also consuming more bandwidth for data and entertainment, and the base stations that support 4G communications have huge bandwidth requirements for their wired interconnect backbone.
Q: How does Centellax serve this market?
A: Our value proposition is affordability without compromise in manufacturing test. In the multichannel BERT [bit-error-rate tester] arena, we offer affordable, high-performance products for R&D and IC characterization. Our technology includes programmable stressed pattern generation to address such issues as total jitter tolerance and crosstalk in receivers.
Q: Why is characterizing multichannel ICs so challenging?
A: High-speed chips like terabit routers can have as many as 64 channels of 10-Gbps data inputs, which employ technologies like multitap de-emphasis and receiver equalization to overcome the loss over copper. Because Ethernet is not purely synchronous, this type of design can result in many asynchronous clock domains. The extent of clock-induced simultaneous-switching noise and power-supply noise depends on the phase alignment of the multichannel inputs. You need a test system that can adjust the phase of each data generator independently to find the worst-case bit-error rate.
Q: What is the make-up of your typical suite to address such problems?
A: A good example is our new multichannel BERT for 32-Gbps Fibre Channel applications. It consists of a controller, a pattern generator, and error-detector remote heads that you can put near the device under test, eliminating long cables that degrade signal quality. This tester operates from 2 to 32 Gbps in a single band with no gaps or missing data rates, and it can generate test-rate patterns without the need for external multiplexers. Our systems offer precision alignment and can generate independent bit-rate patterns for each channel. You can also test a multichannel IC fully loaded.
Tying all this together is our Signal Integrity Studio software that allows you to control these tests from your computer. With this equipment, the engineer can analyze IC performance against such factors as electromagnetic coupling, simultaneous-switching noise, and power/ground bounce.
Q: What are some of the fastest-growing applications for your testers?
A: Good examples would be characterizing ICs, such as FPGAs, which are based on SerDes [serializer/deserializer] designs, and Fibre Channel switches. Other fast-growing applications include bus interfaces and backplane switches for servers.
Q: How long will it be before we see widespread adoption of 100-Gbps Ethernet and SuperSpeed USB?
A: People were predicting adoption of 100-Gbps Ethernet by 2013, but we will see significant shipments of products based on that technology this year. Key applications that are driving that demand are short-haul data centers and long-haul backbone fiber-optic systems for telecom. SuperSpeed USB, with applications primarily for serial data transmission in the computer domain, also is likely to be adopted well before the 2014 time frame that many had predicted. T&MW
Julio Perdomo answers more questions on test solutions for high-speed communications in the continuation of this interview.
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