The Best in Test

The IDS PICA probe system represents the first commercialization of IBM’s PICA (Picosecond Imaging Circuit Analyzer) technology for noninvasively debugging 0.13-micron IC designs. The IDS PICA captures photon emissions directly from active CMOS transistors—represented in color in the figure (courtesy of IBM)—enabling users to gather timing data by tracking electrical signals as they travel through semiconductor devices. After setup, IDS PICA runs unattended, storing collected data for subsequent offline analysis. Because the system collects light emanating from the DUT itself, it needn’t generate a beam of any form and thus can scale to smaller device geometries.

Accura 100 12-bit oscilloscope
Nicolet

The Accura 100 takes the 12-bit DSO to 100 Msamples/s. It also adds Windows for ease of use and for connecting to networks, printers, or USB devices. The higher speeds let you perform measurements on devices such as pulsed-width-modulated (PWM) motor drives and switching power supplies with greater accuracy than you get with 8-bit scopes. The 1-Msample/s memory depth lets you see both startup and steady-state signals with one measurement. Analysis software includes math, statistics, and FFTs.

J-260 jitter and timing analyzer
LeCroy

LeCroy’s J-260 (2-GHz bandwidth) brings common jitter measurements to your fingertips through dedicated buttons. Histograms and other statistical functions let you perform measurements such as rms jitter, peak jitter, cycle-to-cycle variation, pulse width, and duty cycle. You can measure jitter with 1-ps accuracy and 99% confidence, and you can view histograms on either a linear axis or a logarithmic axis and measure half-period jitter. You also can use the J-260 to look at jitter in the frequency domain.

TestKompress DFT software
Mentor Graphics

With TestKompress, Mentor Graphics aims to control spiraling costs of ATE by permitting a tenfold reduction in ATE scan-buffer memory requirements—without sacrificing fault coverage. TestKompress embeds within a DUT test logic that interfaces DUT scan chains to the ATE pins that apply compressed test vectors to the DUT. The test logic decompresses those vectors, applies them to DUT scan chains, and compresses the responses for transmission back to the ATE system, which compares that response with the expected response. TestKompress is compatible with Mentor’s FastScan automatic test-pattern generator.

Self-Test and Repair Memory System
Virage Logic

Embedded-memory IP (intellectual property) supplier Virage Logic has moved into the test arena with its STAR (self-test and repair) system for its SRAM cores embedded within SOC devices. With the STAR system, a low-cost logic tester initiates embedded-memory test via an IEEE 1149.1 test-access port. Within the chip, the STAR core complies with IEEE P1500 test-wrapper specifications. An on-chip STAR processor employs foundry-specific test algorithms to detect and repair more than 99% of memory defects. The processor can log errors and export defect information to aid failure analysis.

Suss MFI Real Time Prober
MFI Technologies, a Division of Karl Suss

The Real Time Prober is the only submicron probe system that takes advantage of atomic force microscopy. The heads use a proprietary technique to scan a sample surface so the imaging system can display surface features. The probes can resolve features as small as 50 nm, and after scanning the surface, a tip can make electrical contact with surface features. The combination imaging and measuring tip lets the instrument make real-time measurements on a chip’s surface. The electrical probes can make contact with an area only 200 nm across. The system can accommodate up to four probes, and it supports passive-RF, active-RF, and DC probes.