Give the jitters to IEEE 1394b receivers

No IEEE 1394b-specific test equipment exists - yet. For now, you can use general-purpose test equipment to create test signals and measure a receiver''s jitter tolerance.

Martin Rowe, Senior Technical Editor -- Test & Measurement World, 9/1/2001

IEEE 1394-1995 and IEEE 1394a-2000 define a serial data link that lets computers communicate with peripherals such as digital cameras (Ref. 1, 2). With a top speed of just under 400 Mbps, IEEE 1394 needed a speed boost to keep up with live video transmissions and to make it a viable technology for home networking and for mass data storage. IEEE 1394b—currently a draft document—specifies increases in transmission speed and distance (Ref 3).

Once IEEE 1394b is ratified later this year, peripheral manufacturers will want to start shipping products immediately. In preparation, engineers designing those peripherals need 1394b-compliant chips now. Because dedicated IEEE 1394b test equipment is not yet available, chip makers must develop and debug their chips using general-purpose test equipment.

To verify the integrity of an IEEE 1394b chip’s receiver circuits, you must generate test signals. You can do that with an arbitrary waveform generator (AWG) and then use the AWG to perform jitter tests on receivers. Simply add jitter to a known-good data stream to verify how much jitter a receiver can tolerate. To measure the jitter you create, you can use a DSO or a signal analyzer.

Faster and longer

To attain greater speed and distance in IEEE 1394b devices, the standard’s authors changed the physical-layer (PHY) circuits that send and receive data. Rather than develop a new PHY, the authors incorporated technology already in use by Fibre Channel and Gigabit Ethernet networks.

IEEE 1394 devices use one pair of wires to send bidirectional data and another pair to carry a clock signal. IEEE 1394b, Fibre Channel, and Gigabit Ethernet devices use one differential pair of wires (or fibers) to carry data that contains an encoded clock signal for each direction. IEEE 1394-compliant peripherals can run only at data rates of 393.22 Mbps (known as S400 speed) through copper wire 4.5 m or shorter.

The IEEE 1394b standard defines data rates that exceed S400. The additional speeds, S800 and S1600, cover data rates of 786.43 Mbps and 1572.9 Mbps, respectively. Data can travel over copper wires, glass fiber cables, or plastic fiber cables at lengths up to 100 m, depending on the data rate and medium. (When running over distances of 5 m or less, 1394b devices can revert to the original 1394 clocking scheme and S400 speed if they detect it. Thus, IEEE 1394b devices can maintain compatibility with older devices.)

The increased speeds and distances make a receiver’s tolerance to jitter an important factor in performance. To test a 1394b receiver’s tolerance to jitter, you must use an AWG to create a data stream that makes the receiver under test “think” it’s talking to a 1394b transmitter.

Because IEEE 1394b uses the same PHY as Fibre Channel and Gigabit Ethernet, you may wonder why can’t you use test equipment designed for those technologies to measure jitter in IEEE 1394b devices. While the standards use the same PHY, each uses a unique set of protocols to format the bits it sends. Therefore, test equipment dedicated to Fibre Channel or Gigabit Ethernet won’t communicate with IEEE 1394b devices, which use the same data-link-layer protocols and packet formats as 1394 devices.

Chapter 13 of the 1394b draft specification explains how to organize data signals into packets for transmission to a receiver. The document also specifies signals you need to transmit so your receiver will identify the incoming packets, arbitrate a data rate, establish a data link, and receive data.

IEEE 1394b also specifies clock signals encoded into data streams. Receivers must extract the clock before they can interpret signals as data. Jitter has a direct effect on how well a receiver can reliably extract a clock from the data. Receivers use phase-locked loop (PLL) circuits to lock onto an incoming signal from which they produce an internal reference clock. Too much jitter will cause a receiver’s PLL circuit to lose its lock on the incoming signal.

When a PLL loses its lock, bit errors will occur. The 1394b draft document states that a compliant PHY will produce less than one bit error in 1012 bits—a bit-error rate (BER) of less than 10-12. A receiver, therefore, must function properly at BERs of
10-12 or lower. You need to find the amount of jitter that causes BER to exceed 10-12 to determine a receiver’s jitter tolerance.

PLLs rely on rising and falling edges in the data stream to extract a clock. Too many successive 1 bits or 0 bits will cause a PLL to lose its lock. Like Fibre Channel and Gigabit Ethernet, IEEE 1394b uses 8B/10B encoding to ensure that no more than five identical bits occur in succession. The encoding scheme uses 10 bits to send eight data bits.

The additional bits add overhead to the data rate. To calculate the total bit rate, called the “baud rate” in the 1394b specification, you need to multiply the data rate by 1.25. For example, at S1600 speeds, which have a 1572.9-Mbps data rate, you need a baud rate of 1966.2 Mbps. Table 1 shows the baud rates for all three speeds.

The baud rate sets the minimum AWG sample rate you need. Table 2 shows how many samples per bit you should use with the different sample rates at each 1394b speed. At S1600, for example, you need a sample rate of at least 1966.1 Msamples/s to get 1 sample per bit. But you should use two or more samples per bit, or at least 3932.2 Msamples/s, to accurately reproduce real-world bits. AWGs with such high sample rates are just now appearing on the market.Once you develop the simulated transmitter signal, you must add jitter to it. To create bit jitter, you can alter the amplitude of bits in your test signal. A receiver’s PLL circuit responds to the midpoint between the amplitude of a 1 bit (positive voltage) and that of a 0 bit (negative voltage).

On the left side of the plot in Figure 1, voltage +V1 represents a 1 bit and –V1 represents a 0 bit. A receiver’s PLL circuit will lock onto the incoming data stream and produce a clock signal that’s synchronized to the points where the rising and falling edges cross the midpoint. The time between edges crossing that point remains constant (t1).

Figure 1. By altering the amplitude of successive bits, you can create early and late bits (jitter). Courtesy of Quantum Parametrics.

Suppose that you suddenly change a 1 bit’s amplitude to +V2. Because the AWG’s sample rate doesn’t change, the rising edge’s slew rate must increase for the rising edge to reach +V2 in the same amount of time. The edge will cross the point that the PLL circuit assumes is the midpoint earlier, after a period t2. The PLL circuit will, therefore, receive an early bit. If the following 0 bit resides at –V2, the midpoint between +V2 and –V2 will return to the same level it used before the amplitude changed—the PLL will again reach equilibrium.

Now, if you return the amplitude of a 1 bit to +V1, the slew rate of the rising edge will slow, resulting in a late bit period (t3) that’s longer than t1. You can, therefore, create jitter by alternating 0-1 bit pairs with 6V1 and 6V2 amplitudes. The greater the difference in amplitudes, the more jitter you’ll create. Sections 8 and 9 of the Fibre Channel Methodologies for Jitter Specification explain the types of jitter—and their frequencies—that you must create (Ref. 4).

You can measure the jitter you create with an oscilloscope or a signal analyzer. Some DSOs and signal analyzers let you create your own eye masks for measuring jitter. If you have such an instrument, you should develop eye masks for baud rates that correspond to S400, S800, and S1600 speeds. The time of a unit interval (UI) depends on the baud rate you use. At S1600 speeds, 1 UI = 509 ps; at S800, 1 UI = 1.02 ns; and at S400, 1 UI = 2.04 ns.

Figure 2. Use this eye mask as a guideline to measure the jitter you create for IEEE 1394b receiver tests.

The eye diagram in Figure 2 shows an inner eye mask with a border around it. These hexagon-shaped masks define the smallest eye opening that the receiver must tolerate and maintain its 10-12 BER. If the receiver can operate with a smaller eye opening (more jitter), then it will exceed the specification.

Test points

The draft standard specifies four test points (TP1–TP4) where you must measure the jitter and amplitude of your test signals. Figure 3 shows that these test points occur on either side of a transmission medium’s transmit network and receive network. The networks convert digital transmit and receive signals into the proper electrical or optical signals for transmission. To test receivers, you only need to measure jitter at TP3 and TP4.

At TP3, you measure the eye at the receiver’s connector and verify that the eye’s width is wider than 0.3 times the width of a bit cell’s UI. One UI takes 1.02 ns, which sets the inner mask width to 306 ps at the 1394b connector. The connector and receiver network will add jitter, so the receiver must function properly with an eye opening down to 346 ps at TP4.

To properly send signals from an AWG to a receiver, you must match the AWG’s 50-V output impedance to the receiver’s 55-V input impedance, which ensures that the receiver gets the proper voltage levels and doesn’t create reflections. You need a matching pad to match the impedances. Without the matching pad, you’ll alter the PHY’s input signal and increase reflections.

Although you can use an AWG to create jitter and amplitude variations, you still have to learn to program it to create the proper packets. That’s a time-consuming process. Dedicated test equipment should do that for you. Although we at Test & Measurement World don’t know of any dedicated IEEE 1394b test equipment available right now, we’re confident that test-equipment for 1394b is in development. When we hear of dedicated test equipment for IEEE 1394b products, we’ll tell you. T&MW

References

1. IEEE 1394-1995, IEEE Standard for a High-performance Serial Bus, IEEE, New York, NY. www.standards.ieee.org.
2. IEEE 1394a-2000, IEEE Standard for a High-performance Serial Bus, Amendment 1, IEEE, New York, NY. www.standards.ieee.org.
3. P1394b, Draft Standard for a High-Performance Serial Bus, Draft 1.11, New York, NY, March 27, 2001. www.zayante.com/p1394b/drafts/p1394b1-11.zip.
4. NCITS TR-25-1999, Information Technology - Fibre Channel - Methodologies for Jitter Specification, National Committee for Information Technology Standards, Washington, DC. www.ncits.org.

For more information
IEEE 1394 Community, www.zayante.com/html/IEEEinfo/IEEEcom.html.
Introduction to Gigabit Ethernet, Cisco Systems, www.cisco.com/warp/public/cc/techno/media/lan/gig/tech/gigbt_tc.htm .
Rumer, Bob, “Fighting Jitter in Fibre-Channel Designs,” Communications Systems Design, CMP Media, San Francisco, CA, February 2001. www.csdmag.com/story/OEG20010119S0058

Martin Rowe has a BSEE from Worcester Polytechnic Institute and an MBA from Bentley College. Before joining T&MW in 1992, he worked for 12 years as a design engineer for manufacturers of semiconductor process equipment and as an applications engineer for manufacturers of measurement and control equipment. E-mail: m.rowe@tmworld.com.