Measure an ADC's Transtion Noise--Part 2

To measure transition noise, you need an input voltage (V_in) that generates a 90% frequency of occurrence for code_x and a 10% frequency of occurrence for code_x+1, or vice versa. I showed you how to find those voltages and use a table to calculate s, which represents the transition noise’s standard deviation, or RMS value. This month, I’ll show you a servo-loop circuit that accurately generates the frequencies of occurrence. You need the look-up table (from part 1) only to set up your measurements. Later, you can assume a fixed frequency of occurrence and also a fixed z.

 In part 1, I showed how to solve section (b) of the following equation:

(Eq. 1)

  I used the look-up table to find a value for z that belongs to a given P_x+1 (DV), the probability of an output code occurring for a given input voltage. With the look-up-table method, I had to generate a voltage V_in = V_trans + DV. (V_trans is the transition voltage halfway between two codes.) Unfortunately, I first had to find Vtrans by measuring an output code’s frequency of occurrence—a tedious process. With the servo-loop circuit I’ll describe here, you can simplify the process by forcing the frequency of occurrence you want and then measuring DV for your RMS noise calculations.

Set Frequencies of Occurrence
When you construct the servo-loop circuit (Fig. 1), you select circuit components that set the frequency of occurrence of ADC outputs code_x and code_x+1. Because you’ll now have a fixed frequency of occurrence, the terms F(z) and, hence, z become constant. In the servo-loop method, you can test the DUT at both the 10% and 90% probabilities for code_x+1, and you can double the values of DV over the method in part 1.

With z now fixed and with the new DV, the equation for the RMS noise is: s = (V₂ - V₁)/2z (Eq. 2)

where

V₂ = V_in for P_x = 10% and P_x+1 = 90%

V₁ = V_in for P_x+1 = 10% and Px = 90%

z = 1.281 for a 90% probability of occurrence

Finally, V₂ – V₁ = DV.

The digital control circuit compares the ADC’s output to the code of interest. Voltage V_in increases by about 1 mV if the output code of the ADC is less than code_x+1. V_in decreases when the output code is greater than code_x. V_in will force the ADC to toggle between code_x and code_x+1.

If the output code of the ADC under test is greater than code_x, then the digital control circuit connects op amp U1 to the negative voltage in the voltage divider through switch A (SWA), which forces an increase in V_fine, which decreases V_in. Conversely, if the output of the ADC is smaller than code_x+1, the digital control must switch SWA to apply a positive voltage to U1, which decreases V_fine and increases V_in.

The values chosen for R3 and R1 give amplifier U2 a gain of –0.005, which reduces the step size of Vfine from 180 mV to 0.9 mV. That’s small enough to achieve accurate measurements. But you need an additional coarse voltage (V_coarse) to get close enough to the correct ADC’s input voltage. Because of the low gain of –0.005, V_fine is limited in range.

The 12-bit digital-to-analog converter (DAC) in Figure 1 lets you set V_coarse through summing amplifier U2, which has a gain of –1. Amplifier U2 takes V_coarse and adds V_fine to get V_in. The difference in V_in from the point of 90% frequency of occurrence (V2) to 10% frequency of occurrence (V₁) is DV. You can measure DV with a DMM and use the result in your RMS noise calculations.

To get the desired frequencies of occurrence, you must set the positive and negative voltage changes of V_fine. You do that by selecting the voltage divider resistors, but you must take other factors into account. You can calculate the U1 voltage step at the output from this equation:

(Eq. 3)

  CI integrates the current in RI (V_refp/R_I and V_refn/R_I) over one ADC conversion period (DT). For example, if the conversion period is DT = 2 ms (500 kHz), then you can select R_I = 100 kW, C_I = 1 mF, and V_ref = ±9 V. U1’s output voltage step is about 180 mV in one conversion period.  

If the positive voltage step in U1’s output (V_fine) is 9 times greater than the negative voltage step, then you will get a 90% frequency of occurrence of code_x+1. Conversely, you get a 10% frequency of occurrence of code_x+1 if the negative voltage step is 9 times greater than the positive.

Equation 3 proves that you can achieve a 90% frequency of occurance by providing a higher voltage (in absolute values) of V_refp than for V_refn. The voltage dividers in Figure 1 generate V_refp and V_refn. Make sure that R is much smaller than R_I.

Capacitor C_IP and resistor R3 form a low-pass filter that minimizes high-frequency noise. Resistors R1 and R2 scale voltages V_fine and V_coarse, respectively.

After building the circuit, you will be ready to test ADCs. Begin by selecting your code_x and your code_x+1. With the DAC, set V_coarse equal to the voltage that yields code_x at the ADC’s output. I suggest you set the DAC to produce a V_coarse between the FF0 and FF1 codes of the ADC under test.

Set SWB so V_fine adds to V_coarse and changes V_in to the value V₂ that produces a 90% occurrence of code_x+1. From the look-up table in part 1, (F)z = 0.4 and z = 1.281. Now, switch SWB so you get V₁ so that P_x+1 = 10%. With the help of the servo loop circuit, measure V₁ and calculate DV. Next, calculate z. For P_x+1 = 10%, P_x+1 = 0.5 + F(z). Finally, calculate RMS noise: s = DV/(2z). T&MW

FOOTNOTE

1. Ohnhauser, Frank, "Measure an ADC’s Transition Noise, Part 1," Test & Measurement World, January 1999, p. 11.

Frank Ohnhauser designs integrated circuits for motor control; ohnhauser_frank@burr-brown.com