Status registers ease IEEE 488.2 device control

Instruments with an IEEE 488 interface can signal their need for service by asserting a service-request line, SRQ. When a system controller, usually a PC with an IEEE 488 interface card, detects a service request, it can quickly determine which instrument asked for service. IEEE 488 instruments also include status registers that a controller can read to determine what type of service devices need. To make instrument programming easier, the IEEE 488.2 and the Standard Commands for Programmable Instruments (SCPI) specifications described a standard format for these registers and the commands that control them. Unfortunately, many people don't take advantage of the flexibility the standards provide.

The diagram in Figure 1 shows the architecture for three sets of registers within an Agilent 34401A DMM, which is fairly typical of IEEE 488.2-compliant instruments. Each set of registers, Questionable Data, Standard Event, and Status Byte, contains a series of flags in either an Event Register or a Summary Register and in an associated Enable Register. The DMM's Status Byte, for example, contains four flag bits: Questionable Data, Message Available, Standard Event, and Request Service.

Figure 1. Registers in an Agilent 34401A DMM indicate the status of internal operations and determine which states can trigger a service request on the IEEE 488 bus. Courtesy of Agilent Technologies.

The Request Service flag indicates the DMM has set at least one of the other three flags, and the Request Service flag asserts the SRQ line on the IEEE 488 bus. When the controller receives a service request from the DMM, it can read the Status Byte's Summary Register to determine what service the instrument needs.

By setting bits in the Status Byte's Enable Register to logic 1, you determine which flag or flags in the Summary Register can initiate a service request. You use the IEEE 488.2 command Service Request Enabled (*SRE) to set individual Enable Register bits to logic 1. The command *SRE 16, for example, enables the Message Available flag (bit 4). (Instrument power-up clears the Enable Register bits, so you must explicitly set those you want to generate a service request.)

Two examples show how you can use the DMM's registers. The first example shows how to program the DMM to assert the SRQ line when it has information available. The second example shows how to set up the DMM to assert SRQ after a standard event occurs. The examples use a 33401A DMM and assume the use of National Instruments' Interface Bus Interactive Control (IBIC) utility for direct communication from the controller's keyboard to the DMM. As an alternative, you can use Agilent's Live Keyboard utility. These programs come with each supplier's IEEE 488 controller card. The T&MW Web site provides an ActiveX control that will control IEEE 488 instruments. Go to www.tmworld.com/software, select "Software from Articles," and download the 57JUN99.ZIP file from the 1999 section of the page.

In the first example, commands will set the DMM (configured to device address 22) to notify a system controller that it has data ready. This example uses the Output Buffer and the Status Byte as shown in Figure 1.

The controller sends a *SRE 16 command to the DMM to allow only the Message Available flag to set the Request Service flag and thus assert the SRQ line. So, in this example, only data placed in the Output Buffer causes a service request.

See Listing 1 for the command sequence. Bit 6 in the Summary Register becomes logic 1 only when the DMM has a service request pending. This situation applies to all IEEE 488.2 devices, so if bit 6 is not set in an instrument, it did not assert the SRQ line. Because the DMM did set its Request Service bit, the sequence could continue beyond the steps shown to read data from the DMM's Output Buffer.

The next example shows how you can set up a DMM to tell a controller it has completed an operation. This example uses the Standard Event register shown in Figure 1, and the program steps allow only the Operation Complete flag (bit 0) to signal the completion of an operation. When this flag goes to logic 1, it sets the Standard Event flag (bit 5) in the Status Byte's Summary Register. The Standard Event flag in turn sets the Request Service flag that asserts the SRQ.

The sequence in Listing 2 commands the DMM to reset itself, clear its registers, accept a bus trigger, and check the Status Byte. This example assumes the voltage measurement takes place as expected. If it doesn't, you could examine the Status Byte's Summary Register to determine what other conditions, such as a Voltage Overload or a Device Error, might have occurred. Both examples illustrate how you can take advantage of the standard SCPI commands and IEEE 488.2-compliant instruments to control their operation.