Competing and consorting

Advantest stirred up Semicon West with its push for an open standard for semiconductor ATE. At a July 17 press conference, Intel, National Instruments, and Wavecrest joined Advantest as charter members of the Semiconductor Test Consortium.

NI's participation suggests a PXI-like format for semiconductor test pin-electronics cards. But Advantest America president Nick Konidaris said the goal extends far beyond that. Preliminary documentation calls for modularity in hardware and software, enabling an ATE user to choose hardware and software products from several vendors to upgrade existing equipment.

Apart from the charter members, enthusiasm for the consortium is muted. Advantest's competitors don't openly criticize the initiative but suggest other approaches to cost-effective high-performance ATE. For its part, 3MTS is already offering PXI instrumentation. Teradyne announced in May an open-architecture initiative in an effort to encourage independent vendors to develop instrumentation for its Integra FLEX system. And last year, Schlumberger (now NPTest) focused on microprocessor structural test, developing its DeFT system and winning an Intel preferred-supplier award; the company is now at work on its own open-architecture standard.

At first glance, an open architecture championed by (at least in part) an ATE customer—Intel—may seem more compelling than one developed by an ATE vendor. Customers, however, traditionally lack the expertise of their vendors—that's why they buy, not build. Cooperation between Intel and Advantest could result in an effective architecture that meets Intel's needs, with National Instruments and Wavecrest contributing, respectively, general-purpose and specialized instruments that provide low-cost solutions or enhanced functionality not available within integrated ATE pin electronics.

The chance for success would seem to diminish, though, as more semiconductor and ATE vendors contribute specifications and expertise to the project. ATE systems today range from $100,000 desktop boxes to multimillion-dollar big-iron systems, while DUTs range from simple consumer-product logic controllers to multimillion-transistor SOCs incorporating digital baseband as well as mixed-signal and microwave circuitry. Can a single, open ATE architecture adequately embody the wide price and performance ranges already available in ATE? And can that architecture effectively meet the needs of the range of DUTs?

Standards breed overhead, and additional participants breed additional overhead. Konidaris says this problem will be more than offset by the ease with which a standard interface would permit the handoff of test information throughout a semiconductor production process that's increasingly disaggregated among designers, contract manufacturers, and test houses.

That remains to be seen. The new consortium is in its infancy, and we wish it success as it matures. For at least the next five years, though, a no-holds-barred competition among the big six—Advantest, Agilent, Credence, LTX, NPTest, and Teradyne—with firms including 3MTS, Eagle Test Systems, Inovys, Nextest, SZ Testsysteme, and Teseda nipping at their heels, will be more fun to write and read about.