Affordable ATE: from lab to fab
Traditional suppliers of semiconductor test equipment are striving to control test costs as upstarts put their own low-cost and production-floor systems in play.
Rick Nelson, Senior Technical Editor -- Test & Measurement World, 11/1/2002
Responding to silicon vendors' complaints about the high cost of test, ATE makers are struggling to keep costs down. Traditional ATE vendors are evolving to offer relatively low-cost alternatives to their expensive "big-iron" systems. Meanwhile, some relative newcomers are aggressively pushing low-cost systems. Their offerings extend from the engineering lab to the production floor.
The cost-control options for semiconductor test fall into several categories:
- scalable platforms that enable users to buy only what they need today yet upgrade tomorrow (for example, Agilent Technologies and LTX),
- focused test platforms that offer just enough capability for a specific target device under test (Credence Systems, Eagle Test Systems, Nextest, SZ Testsysteme, and Teradyne),
- test systems that take advantage of design-for-test technologies (Intellitech, Inovys, LogicVision, NPTest, Teradyne, and Teseda),
- small- or zero-footprint systems that minimize real-estate costs (3MTS and Nextest),
- partnerships and standards that aim to keep costs low (Advantest), or
- combinations of these factors.
 |
|
Figure 1 Targeting low-cost, high-volume RF components, the Fusion CX can measure noise figure, error-vector magnitude, 1-dB compression points, and other RF parameters. Courtesy of LTX. |
The scalable platform can seem to be the ideal solution, and Agilent Technologies and LTX have been successful with that approach with their 93000 and Fusion Series systems, respectively. Nevertheless, the ability to scale entails some software and hardware overhead, even if you buy a minimal number of pin cards. Moreover, offerings within a scalable platform do admit to some distinctions. The Fusion line divides into the high-end HF and lower-cost (from $250,000) CX configurations. The latter (Figure 1) offers RF instrumentation covering frequencies to 6.4 GHz and targets single and multisite tests of components serving Bluetooth, 3G wireless, and wireless-LAN applications. Should you need to upgrade to the HF, you can save your software investment but it will require all new hardware. (For a chart providing basic price and performance characteristics of the CX and other low-cost ATE systems, see www.tmworld.com/ATE_low_cost .)
Agilent, too, includes inflection points in its 93000 line-up. At the entry level, the company's Model C200e provides wafer sort of low-end DSPs, baseband wireless devices, and ASICs; at the next step up, the Model C400e tests devices aimed at PC graphics and memory-interface applications plus high-end DSPs and wired-communications devices. (P and NP models in the 93000 line-up handle higher performance needs.)
SZ Testsysteme combines a similar scalable approach with targeted options. The company offers a consistent hardware architecture and software development and operational environment—the SZ Programming and ATE Controlling Environment (SPACE)—across its lineup of the M3300 Piranha, M3660 Falcon, and M3900 Kodiak test systems, but the high-end Kodiak, at 384 digital pins max at 200 MHz max, falls far short of the 1024-pin GHz-rate capabilities of the high-end 93000 and Fusion platforms.
 |
|
Figure 2 Able to provide outputs from -2 V to +28 V, the VPIN pin card works within the M3300 Piranha, the M3660 Falcon, and M3900 Kodiak ATE systems. Courtesy of SZ Testsysteme. |
Also in August, SZ introduced its RF Beacon subsystem for its three testers. Focusing on Bluetooth, 3G, and other wireless applications, the subsystem can extract S-parameters and make error-vector-magnitude measurements.
Eagle Test Systems addresses similar markets with its ETS line-up. Capabilities extend to 256 digital channels, more than 300 analog channels, and 16 RF ports for multisite testing of low-cost devices used in mobile and consumer applications.
Focused systemsOther companies forego the single- or scalable-platform approach, deploying distinct hardware and software configurations to targeted applications. Credence Systems contends that its ASL 3000RF, at a $400,000 base price, is a more cost-effective approach for low-cost wireless-device tests than a scaled version of its top-of-the-line, $1.5-million-and-up Octet system could ever be: The hardware and software infrastructure required to support thousand-pin gigahertz-rate performance is inherently costly, even if you don't choose to populate it with a thousand gigahertz-rate channels.
Of course, the fact that systems like those in the ASL series don't fit under the same umbrella as the Octet doesn't mean that systems like ASL models are inflexible. For example, the ASL 2000MS series for testing relatively low pin-count mixed-signal DUTs that don't have RF functionality features a 30-slot instrument-card backplane to support a variety of instrument options, and it supports zero to sixty four 50-MHz digital pins. In addition, it shares Credence's Windows NT-compatible Visual ATE software environment, which also serves the company's RFx series of RF IC testers. Nevertheless, the downside is that if your DUT mix evolves such that its test needs exceed what an ASL 2000MS or ASL 2000RF can deliver, you face a daunting hardware and software upgrade path.
Teradyne in 1998 made a pioneering effort in ATE cost control when it introduced the Integra J750 (Figure 3). Based on Windows PC technology instead of on the more costly Unix workstation model, the J750 targets test of microcontrollers and other VLSI devices.
 |
|
Figure 3 Although it began life as a focused, low-cost digital test system for VLSI logic, the Integra J750 has acquired analog-measurement capabilities, such as the spectrum-analysis capability illustrated here. Courtesy of Teradyne. |
Nextest aims to serve manufacturers of low-cost devices with its 133-MHz clock-rate Maverick; it targets flash memories, microcontrollers, SOCs, ASICs, and PLDs in configurations ranging from a 64-pin engineering station to a 512-pin production system. It, too, gets a boost from analog and RF instrumentation options, including a link to the Femto 2000 instrument.
Capitalizing on design for testOther test companies are developing systems for DFT-intensive DUTs (Ref. 1). Intellitech, for example, offers its RCT-II benchtop tester, which accesses a DUT's internal scan chains via the IEEE 1149.1 Test Access Port (TAP). It includes four analog channels for DUT parametric measurements.
The RCT-II locates faults by acquiring repeated scan-chain dumps that represent data that precedes and follows a debug event occurring during functional operation. The data dump can be used during simulation or RTL debug. The RTC-II tests DUTs that employ what Intellitech calls a "silicon debug architecture," which includes an on- or off-chip system-clock counter/timer, a system-clock control to manage pre- and post-event triggering, and a trigger input for synchronizing DUT operation with external events.
LogicVision offers a low-cost benchtop system, called the Validator, that tests only those devices that embody LogicVision's embedded-test intellectual-property (IP) blocks. The hardware razor that the company hopes will drive sales of the IP blades, the Validator enables engineers to perform full-speed debugging of first silicon. During production, test can transfer to ATE systems from Advantest, Credence, SZ Testsysteme, Teradyne, and others that have earned LogicVision's "LV Ready" certification.
Other firms are taking a more general-purpose approach to testing DFT-compliant parts—that is, they don't require proprietary test IPs like LogicVision's. Teseda and Inovys have developed testers for standard scannable logic devices—devices designed with software tools that automatically generate test vectors that comply with the IEEE 1450 Standard Test Interface Language (STIL) format. Teseda's first offering is a $60,000 engineering desktop model—the Validator 500—that supports failure analysis and test-program development. Inovys's $300,000-and-up Ocelot (Figure 4) is designed for the production floor.
 |
|
Figure 4 Companies including Inovys are counting on the rapid adoption of DFT techniques that yield STIL-compliant vectors; systems such as the Ocelot shown here target STIL-compliant, DFT-enabled DUTs. Courtesy of Inovys. |
The Inovys Ocelot offers optional AC scan-test hardware to eliminate the need for separate insertion for at-speed testing on the production floor. It provides up to 1,536 general-purpose data pins to support multisite (32 or more sites, with multisite capability integrated into the operating system to enable test programs to serve in different multisite configurations) and high-pin-count-DUT test applications. The system's compliance with STIL and its integration with EDA tools simplify test development and data analysis. Because Ocelot natively supports STIL (that is, it doesn't require translators to interface with STIL data), test vectors retain their identity with respect to the design database (an unexpected response vector detected by the Ocelot in production test can be mapped to specific transistors, gates, or nets within the design database). A proprietary dynamic clock waveform generator (DCWG) option supports on-the-fly launch and capture event timing.
The Teseda and Inovys offerings might be considered testers with a heavy emphasis on DFT, but they weren't the first to carry a DFT label. That honor went to the DeFT system from NPTest, introduced last year. It was followed by Teradyne's Integra FLEX.
Dubbed "middle iron" by one competitor (Ref. 2), the DeFT and Integra FLEX retain some features of their "big-iron" functional-test counterparts: higher clock rates, better edge-placement accuracy, and lower jitter. And while the DeFT focuses strictly on structural test of digital devices, the Integra FLEX accommodates analog instrumentation to perform functional test of mixed-signal devices.
Minimal footprintsMaking a push into compact production-test systems, 3MTS offers its 3M10 RF test system and 3M20 mixed-signal test system. Supporting 80-MHz clock rates and 200 digital pins, these systems can perform structural as well as functional test. These compact systems can mount within the footprint of handling and probing equipment (Figure 5) to minimize production-floor real-estate requirements. Nextest, too, is emphasizing compactness: Its 512-pin Maverick fits within a 2-m2 footprint; the 256-pin version fits within 5 ft2.
 |
|
Figure 5 Instrument cards complying with the PXI format fit into the zero-footprint 3M20 system, shown here mounted on an Electroglas EG4/200e 200-mm wafer prober. Courtesy of 3MTS. |
In addition to being compact, the 3MTS systems offer a further innovation— many of its instrument boards comply with the PXI standard. This approach opens the door to third parties, who can provide boards offering cost or performance advantages.
Working togetherThe development of a similar, industry-wide open approach is the goal of the ATE Semiconductor Test Consortium (www.semitest.org), which was launched in July by Advantest, Intel, National Instruments, and Wavecrest. An Intel document provided at the press conference announcing the consortium states that to improve cost, performance, and scalability, ". . .component ATE needs to move from proprietary platform architectures to modular solutions that scale and encourage multiple partner participation. . . .We expect to see the same level of variety, competition, reuse, and innovation that the VXI and PXI standards have promoted in non-VLSI ATE."
Wishful thinking? Perhaps (Ref. 3). But as the efforts of 3MTS and others demonstrate, standards ranging from STIL to PXI are already playing a role. Moving forward, proprietary and standards-based efforts will combine to optimize semiconductor-test cost and performance.
The following company information appeared in the original print version of this article. For up-to-date information about companies, visit the ATE/Production Test/QA portion of our Buyer's Guide.
| Test-equipment vendors mentioned in this article | ||
| 3MTS San Jose, CA, 408-435-1788 www.3mts.com |
Advantest Santa Clara, CA 408-988-7700 www.advantest.com |
Agilent Technologies Santa Clara, CA 800-452-4844 www.agilent.com |
| Credence Systems Fremont, CA 510-657-7400 www.credence.com |
Eagle Test Systems Mundelein, IL 847-367-8282 www.eagletest.com |
Electroglas San Jose, CA 408-528-3000 www.electroglas.com |
| GuideTech Sunnyvale, CA 408-733-6555 www.guidetech.com |
Intellitech Durham, NH 603-868-7116 www.intellitech.com |
Inovys Pleasanton, CA 925-924-9110 www.inovys.com |
| LogicVision San Jose, CA 408-453-0146 www.logicvision.com |
LTX Westwood, MA 781-461-1000 www.ltx.com |
National Instruments Austin, TX 512-683-0100 www.ni.com |
| Nextest Systems San Jose, CA 408-817-7200 www.nextest.com |
NPTest San Jose, CA 408-586-8200 www.nptest.com |
SZ Testsysteme Amerang, Germany +49-8075-170 www.sz-testsysteme.de |
| Teradyne Boston, MA 617-482-2700 www.teradyne.com |
Teseda Portland, OR 503-223-3315 www.teseda.com |
Wavecrest Eden Prairie, MN 952-831-0030 www.wavecrest.com |
| References |
|
| Author Information |
| Rick Nelson received a BSEE degree from Penn State University. He has six years experience designing electronic industrial-control systems. A member of the IEEE, he has served as the managing editor of EDN, and he became a senior technical editor at T&MW in 1998. E-mail: rnelson@tmworld.com. |
Talkback
Related Content
Related Content
