Test line cards in the loop

When manufacturing telecom line cards, you must ensure that they comply with various standards. You need to subject each card's receivers to jitter and low-power signals, and you must verify that its transmitters provide enough power to traverse long distances with minimal jitter. You also must test whether the card correctly multiplexes and demultiplexes data streams. Table 1 provides a summary of the key tests for telecom line cards and "The basics of line cards," p. 17, describes the functional block of a line card.

Figure 1 Test telecom line cards by looping back an optical test signal froma transmitter to a receiver.

To comply with telecom standards such as Telcordia GR-253-CORE and ITU-T G.957, line card receivers must properly detect bits in low-power signals. From those bits, the card must extract a clock signal without producing a bit-error rate (BER) that exceeds 1 x 10^-10 (Refs. 1, 2). Here's the minimum sensitivity a receiver must have for each line rate (OC refers to the Telcordia standard; STM refers to the ITU-T standard):

To avoid corrupting incoming data, the card's clock-recovery and phase-locked loop (PLL) circuits must cope with frequency offsets, which can occur as fixed frequency offsets or as jittered signals with variable frequency offsets. Telcordia and ITU-T specify that a receiver must cope with an offset of ±20 ppm without introducing errors.

Before you can test a line card's receiver circuits, you must synchronize your test equipment as explained in "Synchronize test equipment," p. 18. That clock can either reside in the test set or in an external source. By altering the test signal's frequency, you can test the ability of a PLL circuit to track static offset. When the offset exceeds the clock recovery circuit's locking range, errors will creep into the data stream.

Most PLLs can easily cope with static frequency offsets that fall within their locking range. But jittered signals—those with unwanted phase modulation—challenge a receiver's ability to extract a clock and maintain the required BER.

To test a receiver's jitter tolerance, use the test set to generate jitter at defined frequencies. At each frequency, increase the jitter amplitude until the test set detects an error in the returned signal. The Telcordia standard specifies that a line card must receive signals containing up to 15 unit intervals (15 UI) of jitter while operating at OC-48 speeds without introducing errors.

Figure 2 Jitter-tolerance masks define the limit of jitter that a receiver must tolerate.

You must also verify that a receiver under test can properly extract a clock signal from an incoming data stream, even when the stream contains a long string of consecutive identical bits. Long streams of 1's and 0's, known as consecutive identical digits (CIDs), lack transitions. Long lapses between transitions make clock recovery more difficult for a receiver. For a line card to pass Telcordia and ITU-T standards, it must cope with 33,280 consecutive digits at the OC-48 line rate. So you must generate test data streams with that many CIDs.

Finally, you also need to ensure the line card detects errors properly. When a line card detects an error rate above a prescribed threshold, it sends an alarm to the management system. To test a line card's ability to detect errors, you must apply a known error rate and interrogate the line card. The line card should correctly register and report these alarms.

Typical alarm tests include loss of signal (LOS) and alarm indication signal (AIS) detection. To simulate LOS, use the test set to switch off the test signal. A line card should detect the loss in optical input power and it should report LOS. To test for AIS, you can program a test set to generate an AIS condition and check if the line card detects it.

A line card's transmitters convert electrical signals into optical signals. To ensure successful transmission, the Telcordia and ITU-T standards recommend minimum output power levels for each line rate. Because a transmitter has high output power levels, you must attenuate the signal before you apply it to a test set. The test set measures the output power and, because you know how much attenuation you applied, you can calculate the launch power levels and compare them against these test limits:

Output power also affects the signal-to-noise ratio. If you view the signal-to-noise ratio as an eye diagram, you can easily compare your results with Telcordia or ITU-T recommendations. Compare the eye diagram on an oscilloscope to a mask specified in the Telcordia and ITU-T standards. Most oscilloscopes let you automatically test the eye diagram against the mask.

To create an eye diagram, apply a pseudorandom bit sequence (PRBS) signal to the line card receiver, and measure the loopback signal with the oscilloscope where the signal enters the test set. You can build an eye diagram by triggering the oscilloscope sweep with the test set's divided clock. Each successive sweep builds the eye diagram on the oscilloscope display.

As in received signals, frequency offsets in transmitted signals can cause bit errors. Most line card transmitters can maintain a signal within 5 ppm of the nominal rate, well within the 20 ppm specified by Telcordia and ITU-T. Ideally, these signals don't introduce errors or alarms, so the transmitted signal produces zero errors. If a transmitter fails a BER test, then verify that you've properly made all backplane connections and that you've properly set up the line card. If you have, then reject the card.

Line cards receive data at all line rates, but they often process data at rates lower than the line rate. For example, a line card operating at OC-48 speeds may manipulate data in chunks of STS-1 (1.544 Mbytes/s) speeds.

To perform these functions, the line card must demultiplex the STS-1 lines from the OC-48 line rate. To verify that a line card's multiplexing and demultiplexing functions operate correctly, the test set must produce OC-192/STM-64 data streams made up of OC-48/STM-16 data streams. The line card can then resolve individual STS-1 data streams and process them.

When you loop a test signal back to a test set, the test set can verify the integrity of all STS-1 data streams and ensure they contain no errors. Typically, you test each STS-1 data stream for zero errors in 5 s. Any errors that occur may indicate manufacturing defects such as bad circuit tracks or poor solder joints. You should reject these line cards.