Statistical techniques augment IC quality

Time-to-market pressures and shrinking deep-submicron (DSM) process geometries are forcing test engineers to find ways to preserve quality at the lowest possible cost. Statistical techniques are emerging that can help you cost-effectively screen defects while maximizing test throughput.

Chipmaker LSI Logic (www.lsilogic.com) is concerned with defect densities at DSM process levels. Lucas Tsai, senior marketing manager of the company's Advanced Silicon Products division, says, "Killer-defect density increases with technology scaling. Tiny particles that were nonfactors for previous process generations are becoming chip-destroying contaminants" for the company's 0.18-µm and 0.11-µm ASIC process technologies. To help identify and correct for defects in DSM processes, LSI Logic employs a statistical post-processing test methodology that it developed in collaboration with Portland State University.

The methodology identifies unusual data values, or statistical "outliers," by using raw data from ATE. These outliers may meet test specifications yet be suspect for other reasons—for example, they may be "good parts from bad neighborhoods," says Tsai, a situation that requires a skeptical look at the devices' otherwise satisfactory test results.

Devices fabricated in deep-submicron processes can be prone to bridging defects like the one shown here. Courtesy of LSI Logic.

Bibbee says he's learned that the test process—and "test is a process, not a gate," he emphasizes—can itself cause as much or more troublesome variation than the fabrication process. A test process that provides unacceptably varying results is one he describes as "out of statistical control." Bibbee says he's found that, typically, 30% to 40% of tests that he's studied are out of statistical control—the causes range from defective test fixtures to analog instrument drift.

Bibbee uses several factors to determine whether a test system is in statistical control, including the Cp and Cpk process-capability indices, outlier prevalence, and standard deviation. "For example," he says, "if you make many analog measurements and find that the standard deviation is zero, then you know something is wrong."

Once a test process is brought into statistical control, Pintail's TestVision suite can implement sampling of a subset of tests (for instance, 200 of the 400 total tests performed on a device). The software monitors test results and provides real-time indications regarding when and how much sampling is appropriate.

While LSI Logic's statistical post processing applies to DSM logic chips, Pintail's software works with mixed-signal devices. Next, says Bibbee, the company will target logic chips as well as subassemblies and printed-circuit boards.

Rick Nelson, Executive Editor, rnelson@tmworld.com