DSM drives signal-integrity concerns
Rick Nelson, Executive Editor -- Test & Measurement World, 9/1/2003
At deep-sub-micron (DSM) geometries, you'll find that increased coupling capacitances, current densities, and interconnect resistances can combine with lower power-supply voltages to present signal-integrity (SI) challenges that can't be met using traditional IC design techniques.
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Capacitive coupling can allow an aggressor net to induce a noise glitch on a passive victim net. The coupled energy may be sufficient to cause an unintended transition, which can propagate to a bi-stable device that captures it, leading to a functional failure. |
Rajiv Maheshwary, director of marketing for static timing products at Synopsys (Mt. View, CA), contends that SI issues must be addressed with a design strategy that analyzes an IC's SI characteristics and automatically makes repairs. To that end, the company's Galaxy design platform generates noise maps and reroutes potentially troublesome nets before physical synthesis.
For more information on SI and how to ensure it, see www.synopsys.com/products/signal_integrity/signal_integrity.html.


















