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EMC gets to IC level

Richard A. Quinnell, Technical Editor -- Test & Measurement World, 4/1/2004

As ICs become more like entire systems on a chip, they begin to suffer from system-level problems. The susceptibility to and generation of electromagnetic interference is one such problem. With single-chip designs becoming common, product developers are starting to look to chip vendors to solve electromagnetic compatibility (EMC) issues. To support that effort, a new group of international standards is emerging to define how to measure the EMC of chips.

The International Electrotechnical Commission (IEC; www.iec.ch) is one of the standards bodies addressing the need for standardized EMC test methods at the IC level. The organization is trying to coordinate with other standards bodies working on the same issue, such as the Society of Automotive Engineers (SAE) in the US and the VDE in Germany, to gain consistency for users. The IEC standards being developed break the testing of IC EMC into two areas: RF emissions and RF immunity.

The RF emissions standards are the furthest along in development. The IEC has created a working group (SC47A-WG9) under its IC technical committee to create the standards, and the group will have the full standard set for emissions (IEC 61967, "Integrated Circuits—Measurement of electromagnetic emissions, 150 kHz to 1 GHz") either published or available in draft form by mid-2004. The immunity standards are about a year behind, with completion estimated for 2005.

The IEC 61967 emissions test specifications call for TEM cell measurement of radiated emissions, a surface scan for radiated emissions, a test of conducted emissions across a load, and conducted emissions using a magnetic probe. There is also a test of conducted emissions designed to estimate the radiation of connecting cables in an application using an applications board. All other tests use a defined test board.

The defined test board is a key part of the emission standards. Because the emission level of a powered device is so highly dependent on the coupling and radiating efficiency of the chip's connection circuitry, the standard specifies the design and fabrication of the test printed circuit board (PCB) in great detail. The drawback of controlling the test board so tightly is that the measured results are difficult to correlate with the performance of a chip in its application PCB. Yet, the tight control is necessary if the tests are to provide a meaningful basis of comparison. Testing based on the specification, then, is best used to compare ICs from different manufacturers or in different package options rather than as a predictor of system emissions.

Similar considerations affect the immunity test specifications in IEC 62132, "Integrated Circuits—Measurement of electromagnetic immunity, 150 kHz to 1 GHz." As with emissions, a well-defined test board is an essential part of the specifications and is described in Part 1 of the draft standard.

The IEC SC47A WG 9 has more to do after it finishes the immunity test specifications. The group fully expects that many issues will arise with the specifications that will need resolution. Already an amendment to IEC 61967 Part 4 is under consideration. The group also has plans to create additional specifications, such as transient immunity test standards for ICs. But the trend is clear. EMC testing is moving to the chip level.

Table 1 EMC standards for ICs
IEC 61967— EmissionsPublishing DateIEC 62132— ImmunityPublishing date
Part 1—GeneralMarch 2002Part 1—GeneralEnd 2004
Part 2—Radiated, TEM Cell Method Early 2004Part 2—TEM Cell Method Early 2005
Part 3—Radiated, Surface Scan Method Early 2004Part 3—Bulk Current Injection MethodEnd 2004
Part 4—Conducted, O/150 O Direct Coupling MethodApril 2002Part 4—Direct RF Power Injection MethodEnd 2004 1
Part 5—Conducted Workbench Faraday Cage MethodFebruary 2003Part 5— Workbench Faraday Cage MethodEnd 2004—
Part 6—Conducted Magnetic Probe MethodJune 2002

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