Design-for-test tools complement ATE
T&MW Staff -- Test & Measurement World, 7/1/2004
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Year-to-date (January to April) PCB shipments are up 42.6% over the same period in 2003, according to the IPC.
That should be good news for automatic-test-equipment (ATE) suppliers, and in fact, semiconductor ATE vendors have seen significant revenue growth (see “Here’s the boom, now avert the bust ,” T&MW, June 2004, p. 19). Nevertheless, customers will continue to focus on minimizing their capital-equipment expenditures.
In semiconductor ATE, that will mean an increased emphasis on
design-for-test (DFT) and built-in self-test (BIST) techniques and on low-cost test systems that take advantage of an IC’s DFT and BIST functions. Yet, the need for high-clock-rate, high-pin-count functional test systems will remain because emerging high-performance serial links such as PCI Express will resist low-cost DFT solutions.
For high-performance PCB test, high-performance, high-pin-count in-circuit testers employing high-pin-count bed-of-nails fixtures will remain contenders, but lower-cost limited-pin-count and flying-probe testers will gain ground as board designers increasingly incorporate boundary scan, particularly the emerging IEEE 1149.4 analog and 1149.6 AC extensions. In addition, test engineers will be looking to inspection equipment to offload in-circuit testers. T&MW
