Microprobing uncovers IC flaws

Contact probing, or microprobing, of a semiconductor device offers failure analysts a fundamental tool for electronic testing. Probing individual conductors and devices lets analysts selectively inject, and measure the effects of, real-time currents and voltages on individual semiconductor devices under varying conditions. This form of device-by-device analysis proves critical when analysts must locate and identify specific types of failures.

Failure analysis occurs at all steps in a semiconductor's life cycle; from tests in a design lab to analysis of field failures. Descriptions of techniques used in three situations illustrate how analysts apply probing techniques.

Figure 1. Although compliant probe tips flex slightly with movement in all directions, the tips maintain a good contact.

Probing performed at varying temperatures presents several challenges. If testing involves slowly increasing a device's temperature, expansion of the thermal chuck (during wafer testing) or expansion of an IC's package (during device testing) can push the semiconductor material into the probes. That action can produce a loss of contact or, at its worst, it can cause the probes to damage the device under test (DUT).

Some heated chucks reduce the distance between the mount and the DUT, which minimizes the thermal expansion of the chuck surface and the DUT. Compliant probes (Figure 1) flex with the movement of the DUT in all directions and help maintain contact during thermal cycling. The closer to the perpendicular that analysts can mount this type of probe, the better its performance. Compliant probes also help overcome small probe movements that result when probes contact a heated DUT. Motions cease after the temperatures reach equilibrium.

Heating a device that lacks passivation and heating exposed probes can accelerate oxidation that produces a high contact resistance between the probes and the DUT. Gold- or platinum-plated probes reduce oxidation and reduce the amount of "scrub," or movement, a probe requires to break through oxidation on the DUT.

Excessive leakage currents can cause poor performance in semiconductors, particularly in devices such as DRAMs that must retain data for long periods and in devices that must minimize current drawn from a power source such as a battery. Leakage-current failures can result immediately from a design problem but also can appear over time as field failures. (These problems also may appear during final test, but production probing goes beyond this discussion.)

Ionic contamination within a semiconductor material or on its surface can cause increased current levels and electrical short circuits across device junctions. Problems may arise long after the initial ionic contamination occurs due to impure semiconductor materials, poor cleaning practices, surface residues, and so on. The results of this contamination, such as induced inversion due to ionic contamination, may not appear until a device fails after long-term use.

Failure analysts can apply a high-temperature reverse-bias test to detect increases in leakage currents. Raising the temperature of a semiconductor during testing increases the detrimental effect of charge-inversion regions caused by the contamination, thus making any ionic contamination easier to detect (Ref. 2).

A source of the contamination can exist within a semiconductor or in its packaging materials, so analysts usually test a failed device twice: First they test the packaged device and then they test the unpackaged device. Opening the package prior to testing might remove a source of contamination within the packaging materials and alter the test results. (Testing a packaged device doesn't require probing.) After removing the package material, analysts use microprobing to make contact with the DUT's signal paths so they can apply power, inject test signals, and take measurements.

Figure 2. An image from a photon emission microscope (PEM) shows the photon emissions from latchup in a semiconductor. A PEM amplifies low-level emissions produced by higher-than-normal current flow.

Excess leakage current also results from damage caused by electrical over stress (EOS), electrostatic discharge (ESD), or time-dependent dielectric breakdown (TDDB). Instead of destroying a transistor's gate-oxide material (a hard failure), these phenomena can weaken the oxide material (a soft failure) and cause many conductive paths in it.

This effect may eventually lead to excessive leakage current. A device can operate under this condition for some time before it fails. That period depends on the extent of the damage and where it occurred.

Failure analysts use a combination of visual inspection and photon emission microscopy (PEM) to locate gate-oxide defects. A PEM amplifies minute quantities of infrared and visual radiation emitted from a device (Figure 2). After locating a defect, the analysts use microprobing to verify the existence of defects and measure their electrical characteristics.

Gate-oxide leakage tests involve microprobing and measuring very low currents (Figure 3). Analysts can infer the presence of hard failures caused by EOS or ESD damage by comparing the data collected from a DUT with the data obtained by probing known-good devices.

The soft failures caused by TDDB of ultra-thin (less than 10Å) oxides make it necessary to accurately measure changes in oxide current that reflect weakening of the oxide integrity prior to catastrophic breakdown (Ref. 3). A shift of a few tenths of a microampere over time can indicate the presence of a weakened oxide layer, so these types of measurements demand the use of low-noise instrumentation and techniques.

Because leakage-current measurements can require resolution of a few tens of femtoamperes, probing equipment must use triaxial probes and cabling (Figure 4). During "surface-to-surface" measurements, probes contact only the top surface of a wafer or die. Thus, no current flows through the stage or chuck that secures the device for probing. The surface-to-surface setup removes the higher-noise and system-leakage components of the probing system from the measurement setup, which helps ensure accurate measurements during probing.

Electrical overstress can produce defects that cause a device to draw either too much or too little current. In a switch-mode solenoid driver, for example, analysts investigated damage due to electrical overstress on the driver's V_SS power input (Ref. 4). The visual condition of the V_SS line—the conductor had melted and formed a high-resistance connection—indicated excess current had caused the line to reflow. In this case, analysts removed the passivation layer on the driver and used microprobing to apply power to the device so current bypassed the defect.

This type of testing requires a high current, a relatively large power connection to the DUT, and low-resistance probe needles. Large probe tips and recently cleaned or gold- or platinum-plated needles provide the proper characteristics for this type of test (Ref. 5). Poor contact could cause a charge to accumulate, and an electrostatic discharge at the probe tip could further damage the V_SS line and might affect other circuitry.

Figure 5. Selective laser removal of passivation materials from a semiconductor's surface opens areas for probing. Courtesy of New Wave Research.

After connecting the probes and monitoring the current drawn by the solenoid driver, the analysts determined the cause of the failure: Because the circuit—powered at the bypass point—drew the expected amount of current, a transient high-current flow had caused the reflow damage to the V_SS line.In this type of testing, if analysts had measured an abnormally high current flow while powering the device beyond the damaged V_SS line, they might suspect a latchup condition. In that condition, the transistor is always on, so it generates photons that photon-emission microscopes can detect. After the analysts use a PEM to locate the fault's general area, they can remove passivation materials and continue probing in the area of the observed latchup.

Although failure analysts have powerful probing tools at their call, new semiconductor-fabrication technologies present probing challenges that include the need to:

• view devices that visible-light optics can no longer "see;"
• make good contact, but without "probe skid" (a slight movement of the probe to break through surface oxides);
• overcome the high tip resistance at a tiny probe point;
• place four to six probes in close proximity;
• maintain stability of probe contacts on a DUT while placing other probes and while taking data (at below 0.1 micron, it doesn't take much of a disturbance to move a probe off a contact); and
• make low-current measurements.

Contact probing remains an essential tool for the semiconductor failure analyst. The push to smaller device geometries and the need to measure lower currents and voltages challenge test-and-analysis equipment manufacturers. Because no substitute yet exists that can inject and measure signals better than contact probing equipment, equipment vendors and users will continue to cooperate to develop products that meet future probing and testing challenges.