EDA gains larger role in test arena

EDA is taking on a growing role in test. That's the message from this year's International Test Conference (see "Show Highlights ," p. 11), where exhibit space once dominated by ATE makers was taken over by EDA firms including Cadence Design Systems, LogicVision, Mentor Graphics, Synopsys, Syntest, and—making its ITC debut this year—Magma Design Automation. Of the traditional big-iron ATE makers, only Advantest exhibited this year.The increased role for EDA comes during what Bernd Koenemann, chief scientist at Mentor Graphics, called in his ITC keynote address the "era of what you see is not what you get." In this new era, he said, process-related defects, visible to in-line inspection equipment, are becoming less troublesome than the often invisible design-related defects that can plague deep-submicron processes. He advocated a cooperative effort between EDA and process engineers that would take into account EDA abstractions such as netlists as well as real-world physical occurrences in silicon processes, all the while providing for data mining on failed devices to enhance yield improvement.

Indeed, "physically aware" has become a key phrase, with Synopsys announcing that Nvidia has selected the Synopsys Galaxy 2004 "physically aware" test tools for its latest deep-submicron designs. In addition, Magma Design Automation's Dwayne Burek, director of product engineering for the company's design-for-test division, touted the implementation of "Physically Aware DFT" capabilities within his company's RTL-to-GDS II design flow.

Of course, EDA test tools and the test vectors they create aren't of much use without a test system to apply the EDA-generated test vectors and acquire the results. To that end, Burek said Magma has worked with Teseda to establish a seamless design and test flow that, based on the IEEE 1450 Standard Test Interface Language (STIL), supports the exchange of design and test data to support debug and failure analysis. According to Teseda President and CEO Steve Morris, a $1 investment in collecting data from a tester such as his firm's V500 engineering system can yield a $10 return.

In addition to describing its physically aware test flow, Magma announced an interoperability agreement with Mentor Graphics under which Magma's RTL-to-GDS II system will be integrated with Mentor's TestKompress embedded deterministic test tool. Burek said that ultimately, though, the database approaches used for separate design and DFT tools will not be able to handle the huge data volumes required for designs extending below 65 microns. At that point, he said, traditional database approaches will give way to the "data model" technique employed in Magma's design and physically aware test flow.

But don't count out traditional database approaches just yet. Synopsys fellow T. W. Williams noted that, as of August, designers have used Synopsys tools to tape out three designs at 65 nm and to complete four designs at 45 nm.

rnelson@tmworld.com