Show Highlights

The International Microwave Symposium, June 12–17, Long Beach, CA, www.ims2005.org.

Anritsu (www.us.anritsu.com) presented Version 2.0 of the company's MS2781A Signature signal analyzer, which operates up to 30 times faster than Version 1, according to the company. It also debuted its new UMTS Master, enhanced-data-rate (EDR) test software for its MT8850A and MT8852A Bluetooth test sets, and three CDMA2000 1xEV-DO measurement options (RF, demodulation, and over-the-air) for its Cell Master MT8212B handheld analyzer. Boonton Electronics (www.boonton.com) introduced its Model 4500 peak power analyzer, which can capture, display, and analyze RF power information in both the time and statistical domains.

Agilent Technologies (www.agilent.com) demonstrated its N6031A arbitrary waveform generator, which simultaneously delivers 1.25 Gsamples/s and 10 bits of vertical resolution. The company also introduced a 14-bit, 40-MHz-bandwidth digitizer for its PSA Series spectrum analyzers, announced extended frequency ranges on its 80-MHz-bandwidth digitizers, and introduced a 64-bit version of its Momentum 3-D-planar electromagnetic modeling software.

Aeroflex (www.aeroflex.com) announced extensions to its phase-noise offerings—including the low-cost ($27,500) Model PN8000 tester and a new downconverter. The company also announced enhancements to its synthesizer lineup, reporting that the enhanced 2500 series frequency synthesizers are faster, cleaner, and smaller than their predecessor, the FS5000. Rohde & Schwarz (www.rohde-schwarz.com) introduced its ZVT8 eight-port vector network analyzer, its FSL 15.5-lb 6-GHz portable spectrum analyzer, and its 6-GHz SMJ100A vector signal generator.

Design Automation Conference, June 11–18, Anaheim, CA, www.dac.com.

During this year's DAC, representatives of the design, manufacturing-test, and silicon-debug supply chain announced the formation of the Design for Debug (DFD) Consortium (www.designfordebug.org). The goal of the consortium is to address tool-interoperability and methodology issues. Charter members include Corelis, DAFCA, First Silicon Solutions (FS2), Intellitech, JTAG Technologies, Novas Software, and consultant Fidel Muradali.

Magma Design Automation (www.magma-da.com) announced limited availability of its new Blast Yield design-for-manufacturability (DFM) and design-for-yield (DFY) tool for IC designs at 90 nm and below. Cadence Design Systems (www.cadence.com) outlined its strategy for what it calls enterprise verification process automation (VPA), which addresses the link between design and verification and offers users an optimal blend of e, SystemVerilog, and SystemC languages. The strategy mirrors market-tested approaches established by leading enterprise software companies such as SAP and Oracle.

Genesys Testware (www.genesystest.com) highlighted its new ArraytestMaker tool for embedded test and repair of memory. Tharas Systems (www.tharas.com) demonstrated its new Hammer S-Class and M-Class verification appliances, which employ a multicore custom processor designed by the company. It also highlighted its new Virtual Connect, which it describes as an RTL-accurate emulation capability that works with the Hammer systems to perform hardware/software coverification for embedded systems.

Atrenta (www.atrenta.com) introduced its 1Team Embedded C and C++ analysis environment for embedded software. Carbon Design Systems(www.carbondesignsystems.com) introduced its VSP (for virtual system prototyping), which enables users to assemble a system prototype and functionally validate it at the desktop.