News Briefs

Designed to provide faster access to 3-D defect data and images, a new technique from FEI and PDF Solutions integrates PDF's Characterization Vehicle (CV) infrastructure and FEI's Defect Analyzer 300HP DualBeam system for automated in-fab defect analysis. The companies report that the first combined solution was recently delivered to a US-based microprocessor developer and foundry.

The new integrated flow accelerates yield ramps of deep-submicron semiconductors by speeding root-cause analysis of defects. This provides better control over advanced processes, as well as improved yields, reduced time-to-market, and significantly reduced process development costs, according to the vendors.

In the integrated flow, PDF Solutions' short-flow CV test chips are run through the factory, where electrical tests are performed to identify subsurface failures. Once the analysis software identifies failures, it works with the voltage contrast capabilities of the FEI DA 300HP to pinpoint the location of the failures on the wafer to within a fraction of a micron. Defects are then cross-sectioned by the DA 300HP, resulting in a detailed subsurface image of the failure location and of the failing structure. The image enables engineers to identify the cause of failures and validate potential process changes to determine those that reduce failure rates to an acceptable level. www.feicompany.com; www.pdf.com.

Mentor Graphics has announced a joint development agreement with STARC (Semiconductor Technology Academic Research Center), a research and development consortium co-founded by 11 Japanese semiconductor companies. The joint effort will focus on new at-speed delay-test methodologies for IC designs that aim to improve the detection of small delay defects during manufacturing test. The partnership seeks to fulfill delay-defect detection requirements from STARC and its client companies by incorporating new technologies into Mentor's automatic test-pattern generation IC test tools.

"STARC's mission is to seek out new and effective technologies through joint research between universities and the industry, in order to achieve breakthroughs in semiconductor technologies," said Yasuo Sato, senior manager of the Test Methodology Group at STARC. "As our member companies move to 90- and 65-nanometer technologies, improving manufacturing test is a critical requirement. We believe that this partnership with Mentor will satisfy that requirement and will result in a breakthrough at-speed test methodology."

"The proposals from the STARC consortium for improving small delay-defect detection coincides with Mentor's development efforts in the area of at-speed test-pattern generation," said Robert Hum, VP and GM for the Design Verification and Test Division at Mentor Graphics. "We are extremely pleased to be working closely with STARC and look forward to continuing this development partnership to provide real solutions for STARC and our customers." www.mentor.com; www.starc.jp.

Agilent Technologies has selected a name for its upcoming semiconductor test spin-off company. The name Verigy will be used when the company separates from Agilent, and it will carry the tagline, "the brilliance of innovation."

The Verigy name is built from the Latin prefix "veri-" ("true, genuine"), which is the root of "verification," and so ties the name to the test business. The "-gy" suffix comes from the combining form "-logy," meaning the name of sciences or bodies of knowledge, as in biology and geology.

"Verigy is emerging from a powerful historical lineage, a direct line from both Hewlett-Packard's standards of integrity and innovation and Agilent's premier measurement business," said Jack Trautman, president of Agilent's Semiconductor Test Solutions business. "This name captures the spirit of our spin-off organization—proven, responsive, energetic, innovative."

On August 15, 2005, Agilent announced plans to spin off its Semiconductor Test Solutions (STS) business, consisting of the system-on-chip and system-in-package (SOC/SIP) and memory-test areas. The spin-off is expected to take place as soon as is practical this year. Agilent's target is to complete an initial public offering of Verigy near mid-2006 and to complete the spin-off by the end of October. www.agilent.com.

The Texas Instruments TMS320C55x Power Optimization DSP Starter Kit (DSK) provides an integrated set of power-estimation and measurement tools, including power-monitoring capability from National Instruments (www.ni.com). Intended to help developers plan, analyze, and optimize real-time power consumption for products containing TI's C55x devices, the DSK also includes TI's Code Composer Studio IDE v3.1 tools, DSP/BIOS Kernel v5.20 software, and a C5509A-based target board with onboard emulation and board-support libraries from Spectrum Digital (www.spectrumdigital.com).

The kit helps developers measure power consumption through real-time profiling of application code, eliminating the need for separate oscilloscopes and current probes. Developers can cycle their designs through profiles over several days to determine the effects of active and stand-by modes on battery life. The integrated NI power-analysis hardware delivers power-monitoring and triggering functionality via a USB interface. TI offers daughter cards to provide for additional features, including fingerprint sensors, LCDs, codecs, and multichannel ADCs and DACs.

Base price: $495. Texas Instruments, www.ti.com/powerefficientdevices.

The first thing you notice about the DPO7000 series of oscilloscopes is the large, 12.1-in. touch-screen display. The three models in the series (500 MHz, 1 GHz, and 2.5 GHz) can move 250,000 waveforms/s to that screen, which means they can catch most signal anomalies. The deep memory (10 Msamples to 40 Msamples, depending on the numbers of channels) let the scopes run at full sample rate all the time. In "fast acquisition" mode, the scopes store 1000 samples and display them in near real time.

The DPO7000 series features an A/B trigger system that lets you build qualified triggers based on digital bit patterns as well as traditional timing and level conditions. The scopes can also trigger based on bit patterns of low-speed serial buses such as I² C, RS-232, and the automotive CAN and LIN buses. The DPO7000 can decode packets on the CAN and LIN buses as well. Software applications include mask testing for USB and Ethernet compliance and power analysis for testing switching power supplies.

The DPO7000 scopes come with five USB ports, an IEEE 488 port, and a CD/RW drive so you can store data on a CD-ROM. Memory options increase memory by a factor of five over base models.

Base prices: 500 MHz—$14,000; 1 GHz—$17,900; 2.5 GHz—$24,900. Tektronix, www.tektronix.com.

OFC/NFOEC, March 5–10, Anaheim, CA. Sponsored by Optical Society of America, IEEE, Telcordia. www.ofcnfoec.org.

International Reliability Physics Symposium, March 26–30, San Jose, CA. Sponsored by IEEE Reliability Society, IEEE Electron Devices Society. www.irps.org.

Vision Show East, May 9–11, Boston, MA. Sponsored by Automated Imaging Association. www.machinevisiononline.org.

To learn about other conferences, courses, and calls for papers, visit www.tmworld.com/events.