Probing flip-chip interfaces

READ OTHER MARCH ARTICLES:  Contents, March 2006

At Sonoscan, we have found a way to process acoustic-microscopy signals and store them to create what we call a "virtual sample." Our software can then use this raw information to produce images at any depth within a flip-chip device or other sample, even in the absence of the physical part. Thus, if a chip fails, or if tests destroy it, failure analysts can use the virtual-sample data to construct an acoustic image of any part of a previously scanned device.

This capability lets failure analysts image the extremely thin and structurally weak ILD materials that help advanced chips achieve high speeds. In the past, individual layer features within the active portion of a die have not been targets for acoustic microscopy simply because previous microscopy techniques could not differentiate their small features.

A scanning acoustic microscope focuses VHF or UHF ultrasound pulses from a transducer into a sample several thousand times a second. The reflected, or echo, signals provide information about interfaces between materials within the device. As the transducer moves from point to point in an x-y pattern across a sample, software converts the echo signals into a pixel that corresponds to each scanned point.

An interface between dissimilar materials reflects a portion of the ultrasonic signal back to the transducer, while the remainder of the signal crosses the interface and travels farther into the sample (Figure 1). Interfaces deeper within the flip-chip device also reflect and pass the ultrasonic signal. Cracks, delaminations, and other gaps, however, reflect virtually all of the pulse, so little acoustic energy travels through these features.

Figure 1.  When ultrasonic pulses from an acoustic microscope encounter an interface, some energy reflects and some energy continues through the material. A crack or gap reflects almost all ultrasonic energy back to a transducer.

To restrict imaging to a desired depth, or to a thin horizontal layer, analysts set a time "window" that centers on the time it takes the signal to reach the depth of interest plus the time it takes the echo to return to the transducer. The microscope processes the echoes received during the window period to create an acoustic image of the "slice" through a chip that the analysts want to examine.

Most acoustic images are displayed as planar (2-D) monochrome or pseudo-color images that show the characteristics of interfaces. These images let analysts verify a device characteristic, such as a solder bump properly bonded to its bond pad, or detect the presence of a defect, such as a solder bump disbonded from its bond pad.

Instead of storing and processing echoes received from a sample only within a defined window, we have found a way to save every ultrasonic echo signal obtained during scans of a flip-chip device. This means that analysts aren't limited to viewing only a single layer immediately after performing a scan; instead, they can can access raw echo data from an entire volume of the scanned sample and examine any layer at any time.

When analysts have the raw echo data, they can go beyond planar images and apply other acoustic-microscopy techniques. These techniques include acoustic cross-sectioning, which provides the equivalent of a physically sectioned view through the part, and 3-D acoustic imaging, which scans multiple layers and adjusts the visibility of various features to provide transparency and perspective. (These techniques go beyond the scope of this article.)

Figure 2.  A cut-away diagram of a flip-chip device shows the relative sizes and shapes of features that interest failure analysts. The vertical scale is exaggerated to make the inner-layer dielectric (ILD) visible.

To collect virtual-sample data, the ultrasonic transducer scans across the chip several times as it "probes" progressively deeper regions. Software combines the echoes—if any—from the various depths beneath each transducer position to create a single waveform that contains information about all material interfaces. This collection of waveforms—one waveform per scanned position—becomes a virtual-sample file. Although a scanning acoustic microscope could collect data from all depths in a single scan, the process would yield distorted results because the technology lacks a depth of field sufficient to obtain information for all depths with one measurement. Thus, the microscope must focus the transducer for each depth.

In a flip-chip device, the die-to-underfill interface reflects a portion of the ultrasonic energy. The remaining ultrasonic energy travels deeper into the chip where defects (if any) within the underfill as well as the underfill-to-substrate interface also pass and reflect ultrasonic energy.

Figure 3.  This acoustic image of a small portion of a flip chip shows the features that exist within a thin layer near the interface between the chip and its underfill. The circled areas show defects; probably cracks in the ILD material.

Figure 4.  This circled area in this flip-chip image shows a small defect—probably an ILD crack—that only partly obscures the dark solder bump beneath it.

Figure 5.  Two underfill voids, one void above the underfill (white area) and the other void below the underfill (black area), appear in this 300-MHz image. The image shows several questionable ILD features—the lighter solder bumps in the upper matrix of dots.

Although the ILD material provides electrical advantages, it presents a manufacturing challenge because of its porous structure, which makes it prone to crack during processing. Cracks and other gaps in most materials efficiently reflect ultrasound, but cracks in ILD materials tend to be extremely thin, which can make them difficult to detect in a sonic microscopy image. Recent tests at Sonoscan have shown we can detect cracks that range in width from 1000 Å down to 100 Å.

The location of these ILD cracks presents another imaging challenge: They often occur only several microns above the interface between the chip surface (generally the surface of the passivation layer) and the top surface of the underfill material. Because delaminations can occur at this latter interface, we didn't know whether an acoustic microscope could distinguish between nearby underfill delaminations and ILD cracks. As it turns out, it can.

Figure 3 shows the acoustic image of a small portion of the chip-underfill interface on an advanced flip-chip device. This image results from data obtained from a high-resolution 300-MHz transducer. The window applied to the echo signals lets the microscope scan vertical features from just above the top of the ILD layer to just below the tops of the solder bumps that attach the flip chip to a substrate. We had scanned the device and saved a virtual-image file that let us produce this image even though we no longer had the device.

In this type of acoustic image, a solid bond between each solder bump and its associated bond pad appears as a medium-gray to dark-gray dot. (In this case, the darker areas indicate a "good" interface—one that passes most of the ultrasonic energy.) Most of the bonds shown in Figure 3 look good, but larger, more reflective (white) features obscure those bonds beneath them. As a result, you cannot determine whether those hidden bonds are good or bad. (The light areas indicate high reflectance of ultrasonic energy at an interface due to a gap or crack.) Circles highlight two such locations, which may contain cracks in the ILD material over the active portion of the chip. This type of high-resolution acoustic image lets analysts determine the relative depth of the various features in this device, even when only a few microns separate them.

Detailed analysis of the acoustic images may yield more information about potential defects. The image in Figure 4 results from processing virtual-image data from a flip-chip device similar to the one shown in Figure 3.

The superimposed circle identifies one bump bond partially obscured by a small white "notch" that appears to be a small crack in the ILD material. Given the fragility of the material, this crack could "grow" and cause a failure later in the chip's life.