Hybrids jump-start PXI Express
Richard A. Quinnell, Contributing Technical Editor -- Test & Measurement World, 2/1/2007
The PXI Express specification is only a year and a half old, so there are only a few modules available that take advantage of the higher bandwidth it offers. Still, designers should be ready to embrace PXI Express in order to keep their systems upgradable. One key to being prepared is to examine the hybrid PXI/PXI Express backplanes that are now appearing on the market.
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A hybrid chassis allows designers to mix PXI and PXIe boards, simplifying upgrades as new boards become available. |
Unlike the parallel PCI bus, which must be routed to all its many users, the serial link is point-to-point. Connections are peer-to-peer and can be made nonblocking. Thus, the bus bandwidth for a PXIe link can be dedicated to the transaction taking place, and simultaneous backplane transfers between two pairs of cards are possible.
In addition to the high-speed data path, PXIe provides enhanced synchronization capabilities. Taking advantage of high-speed differential signaling technology, PXIe distributes a 100-MHz clock to card slots. This both improves the accuracy of timing in the system and reduces the need for clock multipliers to generate frequencies greater than the 10 MHz available on conventional PXI. PXIe also offers differential triggers arranged in a star formation from slot to slot to help enhance timing and synchronization.
Software compatibility with PXIA key feature of PXIe is that modules based on the standard are fully software compatible with PXI. This compatibility results from hardware within the PXIe interface that automatically handles the serialization of parallel data as well as the out-of-band control signals (such as interrupts), presenting the same interface to application layer software as traditional PXI. The consequence is that operating systems, drivers, and applications code developed for PXI systems can run unaltered on PXIe hardware.
The PXI Systems Alliance (PXISA) released the PXIe specification in August 2005, and as yet only a few compatible products are on the market. These include PXIe controllers from National Instruments, PXIe carrier boards for PMC modules from Radstone Embedded Computing, and a data-recording system from Conduant. The available products are not yet enough to make an entire system based on PXIe. Developers can, however, prepare to capitalize on new PXIe products when they create their next generation of test systems. The trick is to use a hybrid chassis.
Hybrid systems open doors to PXIeA hybrid PXI/PXIe chassis, such as the eight-slot PXIe-1062 from National Instruments, allows designers to create test systems that use both PXI and PXIe cards. The NI chassis uses a PXIe system controller and a PCI-to-PCIe bridge to support three types of peripheral card slots. One type of slot accepts conventional PXI cards, the second type accepts PXIe cards, and the third type is a hybrid slot (Figure 1). The hybrid slot can accept a CompactPCI card, a PXI card, or a PXIe card as long as the card is hybrid-slot compatible. Together, the three slot types give designers considerable flexibility, as they can use various combinations of cards when configuring a system.
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Fig. 1 The PXIe hybrid chassis has card slots dedicated to a) conventional PXI cards and b) PXIe cards and also includes c) hybrid slots that can accept a CompactPCI card, a PXI card, or a PXIe card. Courtesy of the PXI Systems Alliance. |
Not all PXI cards are hybrid-slot compatible, however, so developers should check their choices carefully. The differences between compatible and noncompatible cards are located in the J2 connector area.
The J2 connector carries the PXI local bus as well as power, timing, and synchronization signals. The PXIe card slot replaces the J2 connector of PXI with two connectors: XJ3 and XJ4. The XJ3 connector carries the eight lanes of high-speed PXIe serial signals. The XJ4 connector carries the power, trigger bus, and synchronization signals of PXI.
This arrangement mates with CompactPCI cards that do not use J2, as well as with PXIe cards, which use only XJ3 and XJ4. Conventional PXI cards that use the full J2 connector, however, will not mate with the hybrid socket. To make these cards hybrid-compatible, developers have to depopulate the J2 connector as shown in Figure 2 and replace it with the XJ4 connector, leaving a space where the XJ3 connector is located.
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Fig. 2 Legacy PXI cards can be made compatible with the PXIe hybrid slot by replacing the J2 connector with a smaller one. Courtesy of the PXI Systems Alliance. |
Many of the new PXI cards coming on the market are now hybrid-slot compatible, so developers will be easily able to create new hybrid systems using new cards. For users that have an inventory of older PXI cards, however, the presence of J2 will prevent their re-use in new hybrid systems. Fortunately, the card manufacturers are starting to offer conversion services. Send them your old board, and for a small fee they will reconfigure it for hybrid-slot compatibility. Hybrid limitations
Working with a hybrid chassis does have some limitations. One is that the hybrid slot only supports eight lanes, limiting bus bandwidth to 2 Gbytes/s. The second limitation is the elimination of the PXI local bus on the hybrid slots. For many users, these limitations may have no significance. The local bus is seldom used, and a 2-Gbyte/s bandwidth still represents a significant performance boost over conventional PXI. Engineers who do depend on the local bus, however, must be careful to place the cards in the conventional PXI slots only.
The availability of hybrid backplanes helps developers meet both performance and cost goals when designing test systems. Low-bandwidth functions, such as motor control, switching, and general-purpose data acquisition, can remain in the PXI form factor instead of migrating to the higher-performance PXIe bus. This helps keep system costs down, as designers do not need to redesign the modules for low-bandwidth functions in order for the entire system to take advantage of PXIe's higher bandwidth.
At the same time, the hybrid backplane gives high-performance functions, such as high-channel-count data acquisition, high-speed imaging, and direct-conversion RF, an opportunity for performance growth. As PXIe boards for these functions become available, designers can replace the conventional PXI board with the higher-performing board without needing to alter the system software.
By bridging the large legacy world of PXI with the emerging world of PXIe, hybrid chassis offer developers the opportunity to jump start their adoption of the high-performance bus. Eventually, as functions migrate to the new bus, full PXIe system backplanes will emerge. In the meantime, hybrid backplanes are here to smooth the transition.
