Offensive channels: overcoming obstacles in printed-circuit board (PCB) traces, vias, IC pins, and cables

Signal-integrity measurements are essential to the development of high-speed communications systems. The higher a signal’s frequency, the more susceptible it is to degradation. Digital signals, especially those over 1 Gbps, lose amplitude and accumulate jitter as they travel through connectors, printed-circuit board (PCB) traces, vias, IC pins, and cables (Figure 1). Thus, the transmission channels “offend” a signal’s integrity.

Digital circuit designers often rely on signal-integrity (SI) labs and engineers to characterize their transmission systems and create HSPICE models that the designers can use to simulate the performance of an individual circuit or an entire system. With these models, designers can predict how a component will behave in both the time domain and the frequency domain.

Figure 1. Connectors, cables, backplanes, and ICs contribute to signal losses in electronics systems.

Figure 2 shows a signal that degrades as it travels along a trace in a standard FR4 PCB. A serial data stream with a clean, wide eye diagram enters the trace, but after traveling 34 in., the signal is unrecognizable. Designers can compensate for the distortions that cause eyes to close by adding adaptive equalizers to their data receivers, but to do that, they need to know the condition of the eye.

Connector, cable, backplane, and component makers often test and model their products in the time domain using sampling and real-time oscilloscopes, bit-error-rate testers (BERTs), and time-domain reflectometers (TDRs). They may also make frequency-domain measurements using microwave test equipment such as spectrum analyzers and vector-network analyzers (VNAs).

Figure 2. High-speed serial data streams lose amplitude and accumulate jitter as they travel through a PCB backplane. Courtesy of Tektronix.

“We test connectors at data rates up to 12 Gbps and at frequencies up to 20 GHz,” said Dave Helster, director of circuit test and design at Tyco Electronics, a manufacturer of connectors used to carry both serial data streams and microwave signals. In the time domain, the company’s engineers perform TDR measurements to determine a connector’s impedance. In the frequency domain, the engineers produce S-parameter models of their connectors using VNAs.

At such high frequencies, test fixtures, probes, and cables offend and degrade signals. Tyco Electronics engineers must calibrate their test setups using standards and then mathematically compensate for the effects of the test setup to ensure they are measuring the S-parameters of the device under test (DUT). Once the engineers know how a test setup affects a signal in the frequency domain, they apply calibration factors to their measurements from which they produce a model of a DUT’s characteristics such as frequency response.

At cable manufacturer W.L. Gore & Associates, SI engineers characterize microwave cables at frequencies to 110 GHz. They make S-parameter measurements on cables for digital signals at speeds up to 10 Gbps. “We test at data rates from 5 Gbps and higher,” said technology development leader Tamera Yost. Gore’s SI lab has equipment that can run at 12 Gbps.

Because many serial data streams use differential signals, each cable needs four-port S-parameter measurements. To make these four-port measurements with their two-port VNA, the lab’s SI engineers designed a test box that uses microwave switches.

Although cables attenuate high frequencies more than they attenuate low frequencies, low-frequency measurements are still important because equalizers in serial-data receivers process signals differently depending on frequency. Thus, Gore’s SI engineers use two VNAs to get a complete picture of a cable’s characteristics. One VNA covers 30 kHz to 1 GHz, and another covers 1 GHz to 20 GHz.

To analyze the jitter that cables and connectors add to digital signals, Yost and her colleagues use a digital communication analyzer with jitter-analysis software. “Five or six years ago,” noted Yost, “you just needed to measure total jitter (Tj) and separate it into deterministic jitter (Dj) and random jitter (Rj). It’s not that simple anymore. Now, we have to measure data-dependent jitter (DDj) based on bit patterns.” DDj measurements let engineers learn which communication protocols affect signal quality.

No electronic system is complete without ICs such as field-programmable gate arrays (FPGAs), and at FPGA-manufacturer Xilinx, the SI engineers measure many of the same parameters as those at connector, cable, and backplane companies. The company’s SI engineers characterize SerDes transmitters and receivers and provide HSPICE models that customers use in system designs. Jerry Chuang, manager for system I/O and SerDes devices, and his colleagues also study how PCB designs and board materials affect signals. But Xilinx customers design their own PCBs and thus must characterize their transmission channels based on information about Xilinx’s products.

Xilinx engineers place extra emphasis on jitter. They must demonstrate to customers their devices’ jitter performance because jitter is protocol specific. Protocols such as SONET, PCI Express, and XAUI produce different Tj,Dj, and Rj for any given data rate.

“We measure jitter with both sampling scopes and real-time scopes on serial-bus transmitters,” said Chuang. “We need to understand how each scope manufacturer decomposes jitter because there is a difference.” The Xilinx SI lab uses high-end real-time scopes with bandwidths that keep up with the data rates supported by the company’s devices.

IC designers see problems that engineers at passive-component makers don’t. ICs require power, and power supplies can affect signal integrity. “Signal integrity starts at DC,” said Mark Marlett, principal design engineer at LSI Logic. He pointed this out because his company’s ASICs can draw up to 7 A, and power supplies don’t produce noise unless they’re loaded. The company’s SI engineers look at how noisy power supplies affect the quality of signals. Noise on a power supply, for example, can add jitter to clock signals. (For more on how Marlett and his team automate measurements, see “Test voices.”)

To evaluate the impact of power supplies, the engineers will look at a device in a powered but idle state with just the clocks running. Then, they activate portions of the ASIC, which increases current from the supply, and observe how the increased power-supply load affects jitter. They also investigate how backplanes, cables, and connectors affect signal quality.

Manufacturers of entire electronic systems need to be concerned about SI once connectors, backplanes, cables, and ICs come together to form a system. One such company is QLogic, a manufacturer of storage area networks. QLogic’s SI lab consists of four engineers who measure S-parameters, rise time, jitter, intersymbol interference, noise level, and optical power. The engineers also test for receiver jitter tolerance. Data rates reach 8.5 Gbps for Fibre Channel systems.

QLogic principal engineer Douglas Zhao emphasized the importance of jitter measurements. “We measure Tj, Rj, DDJ, and sinusoidal jitter [sinej] in transmitted data streams. We also test receiver jitter tolerance by adding jitter to clean data streams.” The SI engineers also use a clean signal and reduce a signal’s optical power to test receivers. They often release these test results to customers.

The QLogic engineers also measure the noise in PCB power planes with a real-time scope and a spectrum analyzer. Spectral peaks often indicate resonances in components and PCBs that offend signal integrity.

Regardless of whether they work on components or entire systems, SI engineers tend to make similar kinds of measurements and thus encounter similar obstacles. Perhaps the biggest challenge they face is finding a way to probe circuits and signals.

Figure 3. A test board for PCI Express connects directly to the backplane. Connectors provide access for test equipment. Courtesy of Elma Bustronic.

Elma Bustronic, for example, uses a test board that gives engineers access to eight differential signal pairs through SMA connectors. The board also provides access to shorts and opens and has a MicroTCA edge connector that plugs directly into a backplane connector (Figure 3).

LSI Logic’s Marlett uses the test board shown in Figure 4. His test setup enables him to measure jitter and eye openings on signals moving to and from ASICs.

SI engineers at Gore designed a test fixture that lets them test bulk cable. “It’s a differential to coaxial transition,” noted Yost. A differential cable has a 100- impedance, but test equipment has a 50- input impedance. The fixture lets SI engineers connect to bulk cable without having to add SMA connectors, which, like everything in a signal path, offend the signal of interest.

What does it take to work as an SI engineer? Although there’s no single answer to that question, RF experience is becoming a necessity, as digital signals take on analog characteristics. Company’s that employ RF engineers have an advantage, because they can teach digital engineers on the ways of analog. A background in statistics can also be an advantage.

Figure 4. Engineers at LSI Logic use this test board to measure jitter and eye openings on signals moving to and from ASICs. Courtesy of LSI Logic.

At large companies such as Gore, entire SI labs can have different specialties. The company’s Elkton, MD, lab focuses on digital and microwave measurements, but its engineers in Germany have EMI expertise.

When asked what skills an SI engineer should have, Greg LeCheminant, measurement development engineer at Agilent Technologies, responded, “You need lots of measurement experience.”

“Experience with frequency-domain analysis is also helpful,” added Tyco’s Helster, “but mostly, we look for highly motivated engineers who are willing to learn, because colleges don’t teach about signal integrity.”