Global TMW:
Login  |  Register          Free Newsletter Subscription
Subscribe
Email
Print
Reprint
Learn RSS

DigRF supports baseband and RF chipset test

Rick Nelson, Chief Editor -- Test & Measurement World, 3/1/2007

E-mail

DigRF (www.digrf.com) is emerging as a standard serial digital interface between 2.5G and 3G cell-phone baseband and RF chips. The standard has the support of RF IC, baseband IC, and cell-phone companies, and DigRF functionality is appearing on devices such as Freescale’s RFX300-30 3G multiband RF subsystem, introduced last month.

The standard specifies a 312-Mbps data rate and a choice of 1.8-V LVDS, 1.2-V LVDS, and SLVDS signal formats. One of DigRF’s goals is to facilitate baseband and RF IC interoperability. DigRF consumes little power when operating (cell-phone designers can choose high-speed or low-power modes, depending on the needs of the product they are developing); it offers an even lower power sleep mode; it requires minimal real estate for interface circuits; and it uses as few as six conductors to link the baseband and RF chips. And, of course, it keeps cost to an absolute minimum.

A DigRF acquisition probe enables a logic analyzer to monitor the DigRF serial bus; a baseband IC’s visibility port enables correlation of internal baseband IC operations with DigRF traffic. A signal generator can help monitor receiver performance; a signal analyzer assists with transmitter measurements.

In addition to providing those benefits, DigRF is serendipitously opening a window through which design and validation engineers can monitor data exchanges between baseband ICs and RF ICs. In fact, said Agilent product manager Jim Majewski, DigRF provides one of very few visibility points into cell-phone signals. (A baseband IC’s visibility port provides another.)

To help take best advantage of that visibility, Agilent has introduced digital-acquisition and stimulus probes that make it easy to monitor DigRF traffic on a logic analyzer (see “Product Update,” p. 61). The addition of a signal analyzer enables test of an RF IC’s transmitter; a signal generator aids in the evaluation of its receiver (figure).

During RF IC validation, a stimulus probe can substitute for the baseband IC, which integrators might receive several months after getting their first RF ICs. Majewski noted that the probes and instruments can also be used to help fine-tune baseband algorithms to compensate for RF IC deficiencies—potentially avoiding costly re-spins. In addition to serving design and validation functions, the tools, he said, can also help manufacturing teams monitor lot-to-lot variations when the chips reach high-volume production.

I asked Majewski what would happen when the DigRF path itself is subsumed within a single chip integrating digital-baseband and RF circuitry. He said that for most phones he doesn’t expect that to happen soon: “The two-chip approach has some legs.” He acknowledged that a one-chip approach is attractive for very-low-cost cell phones. But he said that two-chip approaches provide more flexibility for adding features and that they are better equipped for supporting two-antenna schemes for optimizing signal quality, weeding out reflections, and minimizing dropped calls.

rnelson@tmworld.com

 

Faraday selects Verigy V93000

Verigy has announced that Faraday Technology, an ASIC and SOC design-service company, has selected the Verigy V93000 Pin Scale system for the test and validation of Faraday’s SOC chipsets and IP portfolio. Faraday, the design-service partner to foundry UMC, adopted the Verigy system for IP/SOC design verification and test-program generation to foster mass production for its integrated device manufacturer (IDM), design-house, and system-house customers. www.faraday-tech.com, www.umc.com, www.verigy.com.

Parametric-parallel-test handbook

Keithley Instruments has published Parallel Test Technology: The New Paradigm for Parametric Testing, a 60-page handbook offering an overview of the emerging test technique known as parallel parametric testing, a strategy for wafer-level parametric testing that uses concurrent execution of multiple tests on multiple scribe-line test structures and helps semiconductor fabs maximize their test throughput and reduce their cost of test. The handbook is free. ggcomm.com/Keithley/PPTHandbook.html.

Alereon teams with Teradyne on RF test

Teradyne and Alereon have teamed up to use Teradyne’s RF test technology to characterize the operational performance of Alereon’s AL4000 family of ultra-wideband (UWB) devices. Teradyne’s Flex RF ATE helped Alereon ramp up its production to deliver products to more than 50 customers in the second half of 2006. www.alereon.com, www.teradyne.com.

Email
Print
Reprint
Learn RSS

Talkback

We would love your feedback!

Post a comment

» VIEW ALL TALKBACK THREADS

Related Content

Related Content

 

By This Author

Sponsored Links



 
Advertisement
SPONSORED LINKS

More Content

  • Blogs
  • Podcasts

Blogs

  • Martin Rowe
    Rowe's and Columns

    July 8, 2008
    Introducing...Test ideas
    Beginning in the T&MW August print issue, we’ll replace the “Project Profile” ...
    More
  • Rick Nelson
    Taking the Measure

    July 1, 2008
    S-parameters are so yesterday
    Textbook amplifiers operate in linear mode and are easy to analyze. Unfortunately, it’s often ...
    More
  • » VIEW ALL BLOGS RSS

Podcasts

Advertisements





NEWSLETTERS

Click on a title below to learn more.

Test Industry News (3 Times Per Month)
Machine-Vision & Inspection (Monthly)
Communications Test (Monthly)
Design, Test & Yield (Monthly)
Automotive, Aerospace & Defense (Monthly)
Instrumentation (Monthly)
Resource Center E-Alert (Monthly)
©2008 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.
Use of this Web site is subject to its Terms of Use | Privacy Policy
Please visit these other Reed Business sites