IPC standard helps reduce component defects

The molding materials used to package lead-free components differ from conventional epoxies in two ways: They take up moisture more slowly, and they better resist higher temperatures. But at the higher temperatures needed to melt lead-free solders, a component becomes so hot that almost any entrapped moisture will flash into steam and cause damage. In addition, a large difference between the coefficients of thermal expansion of packaging materials can lead to electrical damage. In each case, damage can range from small delaminations to large visible defects, such as a popcorn crack that extends from below the die paddle to the top surface of the epoxy package (Figure 1).

Figure 1. A popcorn crack within a plastic QFP package appears as the red circular area around the die. The assigned color of the crack’s edges changes from yellow to black as the crack gets closer to the surface of the device. Courtesy of Sonoscan.

During the specified floor-life period, components will not absorb enough moisture to cause problems. The D version of the standard provides a lead-free solder classification reflow profile and specific pre-test soak requirements for the molding compounds that have been formulated to survive the higher temperatures of lead-free reflow. (A reflow profile defines the temperature vs. time exposure for a PCB as it moves through a reflow oven.)

The new standard also supplies test specifications that dictate the environmental conditions that must be used to precondition packaged devices. So, component and system manufacturers start with the same definitions as they tailor their processes to manufacture reliable products.

To determine the moisture-sensitivity levels now embodied in the J-STD-020D standard, researchers exposed surface-mount components to specific environmental conditions, simulated mounting these components on a PCB, and passed the PCB through a reflow oven three times using a specific classification-reflow profile. With an acoustic microscope, the researchers obtained preprocessing and postprocessing images that documented both pre-existing defects and defects that occurred during the processing, such as cracks, delaminations, or voids. Researchers at Intel, IBM, NXP (formerly Philips), Agere, and other semiconductor manufacturers performed the painstaking work that led to the standard.

Manufacturers of ICs can use these same tests to classify their components so PCB assemblers can determine how to handle specific types of ICs. The information in Table 1, extracted from the J-STD-020D standard, shows the floor life for components in each of eight moisture-sensitivity levels. The floor-life time refers to the maximum time between removing components from their moisture-barrier packages and passing them through a reflow process. The longer a device sits in a manufacturing environment, the more moisture it can absorb.

For components that comply with J-STD-020D, manufacturers will affix a package label that lists the component’s moisture-sensitivity level and the peak package-body temperature that the manufacturer allows. Level 3 components, for example, have a floor life of 168 hrs at conditions up to 30°C at 60% relative humidity (RH). In addition, the floor-life specifications cover devices manufactured with a conventional or a higher-temperature molding compound.

When developing the standard, researchers empirically determined appropriate reflow-profile parameters and soak times that IC vendors and PCB-assembly companies can use to test components they plan to subject to assembly-line conditions. Soak conditions specify exposure times for components at specific temperatures and RH levels prior to testing.

Tests involve baking components to remove all moisture and then “soaking” them at the standard conditions chosen for a level shown in Table 1 under “Soak requirements.” Prior to testing, the level 3 components require a soak at 30°C and 60% RH for 192 hrs (+5/–0 hrs). To determine whether the moisture and reflow environment caused defects, you must examine the components before and after exposure to reflow conditions.

In Table 1, the “Thermal activation energy” columns under the “Accelerated equivalent” heading apply to packaging materials and not to solder types. The accelerated equivalents listed in the 0.40–0.48 eV column generally apply to materials used to package devices with lead-based-solder leads. Those listed under 0.30–0.39 eV generally apply to higher-temperature-tolerant materials used to encapsulate devices with lead-free-solder leads.

But in some cases, manufacturers may use the higher-temperature materials with activation energies between 0.30–0.39 eV for components that still rely on lead-based-solder leads. Before you run any tests, make sure you know which materials a manufacturer used to package a component.

Level 3 components, for example, require a standard soak time of 192 hours, as shown in Table 1. If you require a shorter soak time, you can expose typical lead-free level 3 components to a 52-hr soak at 60°C and 60% RH, as shown under the 0.30–0.39 eV heading. Level 3 lead-based components require only a 40-hr accelerated soak at 60°C and 60% RH, as shown under the 0.40–0.48 eV heading. Because molding compounds used for lead-free components take up moisture more slowly than those used for lead-based components, lead-free devices require an accelerated soak time that is roughly 30% longer than that for lead-based devices. At the end of the soak period, you must simulate mounting these components on a PCB, pass the PCB through a reflow oven three times using a specific classification-reflow profile, and then examine components for defects.

Because molding compounds may not have the same moisture-absorption rates, and material suppliers will introduce new encapsulant formulations, we emphasize this information paraphrased from a note in the J-STD-020D standard:

Do not use the ''accelerated equivalent’’ soak requirements until research correlates electrical, after-soak, and reflow damage with ''standard’’ soak requirements or if the known activation energy for diffusion of the package materials is not in the range of 0.40–0.48 eV or 0.30–0.39 eV. Accelerated soak times may vary due to the properties of mold compound, encapsulant, and other packaging materials. (The JEDEC document JESD22-A120 provides a method you can use to determine the diffusion coefficient for a material.)

The J-STD-020D standard contains precise defect criteria that define the types of internal packaging defects that could lead to a failure. Specifically, Section 6.1 of the J-STD-020D standard notes that devices that exhibit any of the following are considered failures:

Figure 2. The small delaminations (red) at the wire bonds in this acoustic image of a multichip module may cause a failure if the module goes into a product. Courtesy of Sonoscan.

• an external crack visible using a 40X optical microscope,
• an electrical test failure, or
• an internal crack that intersects a bond wire, ball bond, or wedge bond.

Inspection and tests will likely detect the first two types of defects, but devices with subtle internal cracks might pass electrical tests and later cause field failures. Figures 2–4 show the types of defects test engineers could discover either after running specific device tests or during analysis of failed components.

Figure 2 shows an acoustic-microscopy image of components in a multichip module. This type of image uses an assigned color scale to indicate cracks, voids, delaminations, and other changes in the ultrasonic signals used by the microscope. Three wires extend from the die to nearby lead fingers. The red color at the wire ends indicates a crack or delamination where the wires bond to the lead fingers.

Most likely, the molding compound delaminated from the bond area. It is unlikely such small anomalies could cause an electrical failure before final inspection. But these anomalies could eventually cause a wire to break, because of either thermal expansion or moisture-assisted corrosion. Researchers developed the J-STD-020D specifications to help companies eliminate this type of internal defect.

Figure 3. This acoustic-microscopy image of a component shows delamination that could break a wire or allow contaminants to reach internal wires. Courtesy of Sonoscan.

The red areas—also delaminations—at the inner tips of the lead fingers (Figure 3, area a) and the long delaminations along the length of the top surface of some lead fingers (Figure 3, areas b and c) cause the most concern. These long delaminations require further reliability analysis based on the failure criterion in Section 6.1.e of the J-STD-020D standard, which says that a device cannot have a “surface-breaking” feature delaminated over its entire length. Surface-breaking features include lead fingers, tie bars, heat-spreader alignment features, and heat slugs.

The defects in this component could cause an electrical failure via two possible routes: Delaminations at the inner ends of the lead fingers could break a wire, or one of the long lead-finger delaminations could open a pathway to the exterior and let moisture and contaminants reach the wires.

Not all internal defects cause electrical failures. Some change little or not at all over long periods. But the potential for an electrical failure exists, and manufacturers should not gamble on the future good behavior of internal defects.

Figure 4. This sequence of acoustic images illustrates how internal defects can grow after a chip goes through reflow-soldering processes. The images depict the chip (a) as it was received from its supplier, (b) after 500 cycles of thermal/humidity testing, and (c) after 1000 cycles of thermal/humidity testing. The arrows in b and c point to defects that were revealed during testing. Courtesy of Sonoscan.

When a device or system fails many tests, and those failures stem from a specific type of IC defect, the device manufacturer and PCB assembler may choose from several quality-improvement strategies. Strategies could include failure analysis at the IC manufacturer that leads to improved production techniques and materials and to the reclassification of device moisture-sensitivity levels. PCB assemblers can shorten their allowed floor-life periods, change solder-reflow-oven temperature profiles, and ensure the proper storage of moisture-sensitive ICs.

If you experience failures of a specific IC or packaged device, monitor your own manufacturing processes and consult with the device manufacturer about possible moisture-sensitivity problems. By working together, you can determine how to avoid problems.