Mentor debuts TestKompress Xpress

-- Test & Measurement World, 10/19/2007 11:37:00 AM

TestKompress Xpress technology allows IC manufacturers to meet their quality objectives for process nodes at 65 nm and beyond. This latest version of the TestKompress product (which debuted in 2001) increases the achievable level of compression by providing a more efficient way to handle so-called “X-states”—the unknown states that can arise during manufacturing test. S-states can result in a loss of test coverage if not handled properly and tend to increase the test-pattern size required to test a device thoroughly. Mentor’s patented Xpress compactor technology provides an efficient way to deal with Xs by combining embedded test-data selection circuitry with a software control algorithm. Using Xpress technology requires no change to the functional design and is transparent to the TestKompress user.

“Achieving high test quality for devices built on advanced processes implies an explosive growth in test pattern size,” asserted Osamu Tada, department manager of System Level Design and Verification Technology Department at Renesas Technology. “We see the high level of compression provided by TestKompress Xpress as a critical advance to enable us to maintain high test coverage at a manageable test cost.”

“The industry demand for compression has not slowed down since we first introduced compression to the market in 2001. In fact, based on our customers’ rapid adoption of ever increasing levels of embedded compression, we believe that the ITRS compression roadmap paints an accurate picture of the industry’s need,” said Robert Hum, vice president and general manager of the Design Verification and Test Division, Mentor Graphics. “Mentor is committed to advancing compression technology in order to address not only the current needs, but also the future requirements of deep submicron IC testing.”

Mentor Graphics, www.mentor.com.

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