Goepel boundary-scan I/O modules test PCI Express slots

-- Test & Measurement World, 8/5/2008 7:46:00 AM

Joining the CION family of JTAG/boundary scan interface modules from Goepel are the CION Module/PCIe-x1 and CION Module/PCIe-x4, which enable structural test coverage of x1 PCI Express and x4 PCI Express slots in compliance with IEEE 1149.1 and IEEE 1149.6 standards. The modules work with the company’s ScanBooster and Scanflex families of JTAG/boundary scan controllers, as well as the integrated System Cascon development software.

Based on Goepel’s custom CION ASIC coupled with differential test channels, the modules plug directly into an x1 or x4 PCI Express slot and are controlled through a Test Access Port (TAP). On-board 1149.1 and 1149.6 test channels allow all high-speed signal pins, low-speed signal pins, and the voltage supply pin of PCI Express 1.X and 2.0-compliant connectors to be structurally tested. If additional test channels are required, several modules can be cascaded in a daisy-chain configuration through their transparent TAP interfaces.

Using the System Cascon software, modules are integrated into a test project with automatically generated dot1/dot6 test vectors. Any faults can be interactively debugged and visualized graphically at the pin and net level in the layout and schematic.

With the addition of the CION Module/PCIe-x1 and CION Module/PCIe-x4, the CION family now offers 10 different interface modules for testing a variety of analog and digital interfaces.