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  • DAC panel covers approaches to system prototyping

    July 30, 2009

    Almost all SOC designs today use hardware prototyping at some point in the development cycle. But virtual prototyping can help perform validation and test before hardware becomes available. Chip designers and EDA vendors discussed the current and future roles of virtual prototyping in a Design Automation Conference panel discussion titled "System Prototypes: Virtual, Hardware or Hybrid?"

    To kick off the discussion, panel moderator and EDN executive editor Ron Wilson asked panelists to describe the available methods of system prototyping.

    David Abada of Amicus Wireless said system verification spans a wide range of coverage and levels of detail. "No one tool would do it all for you," he emphasized. System design, he continued, starts at high level of abstraction that requires different tools from the ones you would use when you get down to ASIC implementation, although the various levels of tools might overlap. He mentioned using tools ranging from Matlab for high-level verification down to an FPGA prototype that maps the target chip and can run close to real time.

    The other chip designers on the panel largely agreed. Chuck Cruse of LSI said FPGA prototypes are useful but offer a narrow window of opportunity and that it’s advisable to leverage virtual tools to get to the hardware prototype. Ramesh Chandra of Qualcomm said that the design and verification of complex SOCs involves a lot of levels of abstraction, adding that Qualcomm engineers tend to use a hybrid approach. Olivier Mielo, ST-Ericsson said he has used FPGA prototypes but adds that as designes become more complex virtual platforms are becoming more valuable.

    Software companies represented on the panel included Synopsys and CoWare. Andrew Dauman of Synopsys pointed out that the notion of virtual prototyping is not a new concept, "although it’s gaining notoriety today." Hardware prototypes have always been built, he said, with engineers breadboarding their circuits, but he added that many designers have long employed some form of software model. What’s clearly changing, he said, is the ability of hardware and virtual prototypes to connect together.

    Achim Nohl of CoWare said that design teams have different prototyping needs, depending on whether they are addressing system level architecture, software design, or hardware design. He noted that the virtual tools available today age letting system level designers move away from relying of Excel spreadsheets. A virtual platform, he said, can allow early software development.

    Wilson noted that the panelists all agreed on an "all of the above" prototyping approach but then asked, "How do you combine the [prototyping] tools? Do you use them in a sequence from most abstract to most concrete, or tie them together so that all are available at all stages?"

    Answers suggested that tying tools together to make all of them available at all stages would be an elusive proposition. Nohl said that decisions should not be taken on platform level but rather at the block level, with system architects focusing on interconnect models while software developers use functional processor models. Olivier implied that a key might be project-to-project changes, noting that reused models become more refined every time a new project begins, saying, "When you start a project you don’t what to do everything from scratch"—instead extending the models (of a protocol stack, for example) in an evolutionary approach. Dauman cautioned that you wouldn’t want to force a "golden model" represented at one level of abstraction into another.

    Abada noted that the design process can’t be totally sequential and that verifying that an RTL implementation of a high-level description can take a lot of effort. A single tool that can work at all levels is not there yet, he concluded.

    Posted by Rick Nelson on July 30, 2009 | Comments (1)
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  • July 30, 2009
    In response to: DAC panel covers approaches to system prototyping
    Gary Dare commented:

    Rick, did anyone mention Mentor's Seamless CVE technology as one of the early (and still selling) virtual prototyping platforms, at least for RTL design? (disclaimer: former Seamless customer, recently at Mentor but that shouldn't impact the nature of the question (-;)

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