Optimistic mood sweeps test vendors at Semicon West

A wave of optimism is sweeping the semiconductor equipment industry as evidenced by the positive mood at Semicon West July 13 through 15 in San Francisco. ATE manufacturers in particular had positive things to say about the industry on the exhibit floor and in a special Thursday workshop titled ATE Vision 2020.

On the exhibit floor, Advantest representatives were on hand to tout the delivery of its milestone 1000th T2000 SOC test system, which went to Xilinx at the FPGA maker’s San Jose, CA, facility. Advantest’s T2000 SOC test platform offers high levels of multisite and parallel testing capabilities, helping to speed time-to-volume economics for a broad range of SOC devices. Advantest said the T2000 features a load-board user space more than five times larger than competing alternatives as well as an advanced control architecture to minimize test times, Advantest announced that the T2000 now serves more than 40 semiconductor customers globally. In addition to announcing the Xilinx shipment, Advantest representatives previewed new T2000 mixed-signal modules slated to be announced later this year, with shipments beginning in 2011.

Verigy at its Semicon West booth touted recent releases, including the Verigy V93000 system with Direct-Probe RF capability. Designed to address the semiconductor market’s shift to wafer-level chip-scale packages (WLCSP), the Direct-Probe RF capability eliminates the mechanical interface between the wafer and tester, thereby minimizing the correlation effort between wafer probing and final test, reducing the time between IC development and production, and enabling high multisite interfaces by simultaneously testing up to 32 sites.

Also on display was Verigy’s V101 low-cost SOC test system with new mixed-signal testing capabilities. The company also highlighted its range of productivity-enabling products, including its scalable V6000 FT system, which delivers high parallelism and high yields in the final testing of both flash and DRAM devices; the V93000 HSM series scalable, multi-generation test platform for testing high-speed memory technologies; and Verigy’s Yield Learning Solution for automated on-tester diagnosis of failures that reduces the time and number of wafers needed to achieve entitlement yield. Finally, Verigy showcased Touchdown Technologies’ scalable, MEMS-based probe cards for single-touchdown testing of wafers up to 300 mm.

Off the exhibit floor, Advantest and Verigy technologists were joined by their counterparts from LTX-Credence and Teradyne at a Thursday workshop titled “ATE Vision 2020,” an ongoing event sponsored by the IEEE and cosponsored this year for the first time by SEMI, the parent organization of Semicon West. The ATE presenters were joined by a representative of FormFactor, who described off-the-tester test technologies; a representative of Cascade Microtech, who discussed the challenges of probing 3-D structures; a representative of Mentor Graphics, who discussed EDA’s role in ATE; and a representative of DFT Microsystems, who described a universal pin architecture extending to 10 GHz and beyond. Also presenting were university researchers as well as current or prospective ATE customers from Cisco, AMD, Altera, Micron, STATS ChipPAC, and Broadcom.

I’ll have more to say on “ATE Vision 2020,” but suffice it for now to say that the news out of the workshop for the ATE industry isn’t all rosy. Consultant Ron Leckie, principal of Infrastructure Advisors, said in his workshop keynote address that he expects the field of five major ATE vendors (including Yokogawa in addition to those represented at the workshop) to shrink to three within the next three to ten years.