Test Modes: Part 3

The last test mode we will examine as part of this series is called pattern generators.The idea of having a device use a test mode where it transmits a known pattern isn’t new. What is new is that we’ve seen more standards defining not just the pattern, but also defining the means to cause the device to enter that pattern generating test mode in-band (think ‘ping’ on steroids: http://technet.microsoft.com/en-us/library/cc737478(WS.10).aspx).

Having an in-band pattern generating test mode allows engineers validating devices to use one tool to put devices from different manufacturers into test modes, instead of needing a different method and set of tools (and NDAs!) to test devices from different manufacturers. Both SATA and SAS have defined in-band methods to turn on pattern generating test modes.

The use case for pattern generators is primarily for testing the transmitter of a device. Enable the test mode, connect the device to a high speed oscilloscope, and perform your measurements.

Even in the relatively straightforward case of the pattern generator, there are nuances that we need to pay attention to. For example, high speed oscilloscopes, capable of performing the necessary measurements on a transmitter, don’t have any capability themselves to transmit an in-band command to a device to enable these pattern generators. So, some other tool must be used, such as a pattern or waveform generator, or simply another device (i.e. a motherboard with a SATA interface can be used to enable the test modes on a SATA disk drive). Here, we need to pay attention to what a device in a pattern generating test mode will do when its receiver is disconnected. Will it stay in the test mode? (It’s worth noting that some BERT tools can be scripted to send these in-band test mode commands, but the built-in analysis capability of a BERT isn’t as advanced as that in a pure high speed oscilloscope: http://www.iol.unh.edu/services/testing/sata/tools.php).

All discussed, the advent of test modes, specifically those identified within a standard, allow integrators to perform comparisons reliably. Some kinks still remain, and awareness needs to be employed when using a test mode, as illustrated above. Yet, the benefits of specified test modes will outweigh the additional work necessary to understand the nuances of established test modes, and integrators should see a real benefit by paying attention to and using the test modes outlined in this series.

David Woolf, Research and Development