ITC News and Highlights
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ITC 2008: Synopsys touts DFT MAX compression adoption at 90 nmNovember 1, 2008Synopsys has announced that its DFT MAX compression product has been successfully deployed at more than one hundred semiconductors companies, including Aquantia, Dongbu Hitek, Exar, Frontier Silicon, Imagination Technologies, Integrated Device Technology, ITT, LG Electronics, Manthan Semiconductors, Nuvoton Technology, NVIDIA, Realtek, Renesas Technology, Samsung, Toshiba, and TranSwitch. More
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ITC 2008: Intellitech unveils Bluetooth-based JTAG podNovember 1, 2008Intellitech has introduced its UltraTAP-BT, a Bluetooth-enabled IEEE 1149.1/JTAG pod with non-volatile test program and failure memory. The UltraTAP-BT is designed to allow plug-and-play test and FPGA configuration without the need for a computer, cable, and software. More
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ITC 2008: ATE suppliers join chip makers and OSATs under CAST bannerSuzanne Deffree, Managing Editor, News, EDN/Electronic News, October 29, 2008With similar goals to those of the Semiconductor Test Consortium, Advantest, Intel, LTX-Credence, and others have formed the "Collaborative Alliance for Semiconductor Test" and hope to formalize the organization within an existing industry association. More
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ITC: Talus ATPG touted, test issues cited at Magma eventRick Nelson, Chief Editor, October 31, 2007Magma Design Automation highlighted its new Talus ATPG and Talus ATPG-X and invited Dr. Mohammad Tehranipoor of the University of Connecticut and Brad Lindstrom of Comtech AHA to comment on today’s test issues. More
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ITC: STAR memory system acquires yield acceleratorRick Nelson, Chief Editor, October 31, 2007Virage Logic introduced a new version of its Self Test and Repair (STAR) memory system, which has gained a dashboard of user-selectable options that let users make tradeoffs between test time, die area, and diagnostic resolution. More
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ITC: Inovys touts Sun purchaseOctober 31, 2007Representatives of Inovys were on hand to tout Sun Microsystems’ purchase of multiple Inovys Zero Foot Print (ZFP) test systems that have been coupled with Inovys SpeedScan for high-speed characterization of Sun’s UltraSPARC CMT CPUs. More
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ITC: Micro Control highlights burn-in with test systemOctober 31, 2007Micro Control Company exhibited its LC-1 logic burn-in with test system, which can accommodate to other vendors’ boards that have sizes differing from the standard Micro Control burn-in board dimensions. More
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ITC: OptimalTest demonstrates report and outlier-management toolsOctober 30, 2007OptimalTest demonstrated new features of its OptimalTest Test Management Solutions (OT-TMS) suite of software, including the OT-Reports and Outlier Management tools. It also announced a multimillion dollar licensing agreement with a European IDM. More
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ITC: Chipmakers employ Cadence test technologyOctober 30, 2007Cadence Design Systems reported that companies including K-micro, LSI, G2 Microsystems, and IBM have made use of Cadence’s timing-aware, power-aware, and small-delay-defect test tools. More
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ITC: DeFacTo unveils DFT product that eliminates need for gate-level scanOctober 30, 2007DeFacTo Technologies announced a new DFT product that analyzes an RTL integrated-circuit design, creates appropriate RTL scan-test structures, and inserts them into the RTL design. The new product, HiDFT-Scan, works within existing design flows and with industry-standard synthesis tools. More
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ITC: Goepel demonstrates new System Cascon software releaseOctober 30, 2007Goepel electronic demonstrated the upcoming release 4.4.1 of its software platform, System Cascon, which adds improvements in third-party ATE integration while offering improved tools for the automated handling of nonboundary-scan components and clusters. More
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ITC: Synopsys debuts small-delay-defect, power-management, and yield toolsOctober 29, 2007Synopsys at the International Test Conference announced availability of its TetraMAX small-delay-defect automatic test pattern generator (ATPG), extended low-power-management capabilities within the Synopsys Galaxy environment, and a new Odyssey DFT yield-management module. More
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ITC: Intellitech offers JTAG test platform for PCBs with ARM processorsOctober 29, 2007Intellitech demonstrated its new PT100 Pro test platform for testing PCBs with processors based on ARM architectures. More
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ITC: Teseda highlights V550, announces Hamamatsu agreementOctober 29, 2007Teseda at the International Test Conference highlighted its new 512-channel V550 desktop validation and diagnostic platform and announced that Hamamatsu Photonics will adopt Teseda’s V-series hardware as an option in its semiconductor-device failure-analysis systems. More
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ITC: T2000 gets RF, 2-Gbps digital instrumentsOctober 25, 2007Advantest chose Test Week to announce its 2GDM 2-Gbps source-synchronous interface test module and its 12-GHz 12GWSGA wideband signal generator/analyzer module for its T2000 OpenStar platform. More
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ITC: FormFactor debuts TrueScale wafer probe cardsOctober 25, 2007FormFactor announced at the International Test Conference a new family of wafer probe cards designed to address the rising cost and technology challenges associated with testing wire-bond logic and system-on-chip (SOC) devices. More
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ITC: Asset InterTech expands embedded instrument supportOctober 25, 2007Asset's ScanWorks now includes signal-integrity analysis applications that support Intel’s IBIST (interconnect built-in self-test) embedded instrumentation technology. More
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ITC: Keynoter addresses challenges of nanotechnology and giga-complexityOctober 24, 2007For more than half a century—ever since the Eniac debuted in the 1940s—computing performance per unit weight or per unit volume has increased two orders of magnitude every 10 years. That’s a fact that Gadi Singer, VP and GM of Intel’s mobility group, related to attendees of this year’s International Test Conference. More
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A test transformation (Guest commentary)William Mann, General Chair Emeritus, IEEE Semiconductor Wafer Test Workshop, October 15, 2007
William Mann, founder of the IEEE Semiconductor Wafer Test Workshop, traces the test transformation necessary to address test costs in this three-part series. Part 1 covers the period from an Intel executive’s call to action at the 1999 International Test Conference thorough the emergence of open-architecture, DFT-focused ATE.
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ITC: ATE Vision 2020 to see two generations outRick Nelson, Chief Editor, October 7, 2007Keynoter Martinez of Qualcomm and panelists representing Texas Instruments, Inovys, Sun Microsystems, and Verigy kick off the event. More
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