Revised waveform drives ESD standards
John H. Mayer, Contributing Writer- March 1, 2002
IEC 61000-4-2, the Basic Standard for electrostatic discharge (ESD) immunity (Ref. 1), is being revised to change how the standard defines ESD test waveforms. Proposals to the standard aim to define a more realistic and more repeatable discharge-current waveform for ESD simulators. The improved waveform should lead to more reliable ESD tests. Because the changes are still in committee, they probably won't be approved for at least three years.
Under the existing revision of IEC 61000-4-2, a product that passes ESD immunity tests during development may fail a regulatory compliance test because of differences in the current produced by ESD simulators from different manufacturers. According to David Pommerenke, associate professor at the University of Missouri-Rolla's EMC lab (Ref. 2), an EUT can pass a test at a given discharge voltage, yet the EUT may fail at half that voltage when tested with another ESD simulator because of differences in the current that the simulators produce.
|Figure 1. The present ESD discharge-current waveform need only comply with rise time and current at 30 ns and 60 ns.|
The proposed revision stems from a problem in the way IEC 61000-4-2 defines the discharge-current waveform from an ESD simulator (Figure 1). The standard defines the waveform's initial peak current and its rise time. Itdefines the rise time as the time between when the rising edge reaches 10% of peak and when it reaches 90% of peak. The standard also defines the decay of the current.
Unfortunately, the current version of the standard doesn't define the waveform's rising edge between the 10% and 90% points. As a result, any ESD simulator that produces nonlinearities such as ringing between those points can still be used to perform a compliance test. The high-frequency energy in the ringing could cause a product to fail an ESD immunity test performed with that simulator, yet the same product may pass when tested on an ESD simulator that has no ringing, even at a higher discharge voltage.
|Figure 2. The proposed discharge waveform will require measurements for rise time, peak current, and decay levels at 30 ns and 60 ns based on a mathematical model. Ref. 3|
To improve repeatability among ESD simulators, the IEC's revision effort focuses on limiting the ringing allowed in a waveform. To limit the ringing, the new standard will specify a maximum positive derivative (Dp) of the simulator current's rising edge as well as other parameters.
The Working Group involved in the revision says the new specification will define a range of acceptable positive derivatives centered around approximately 4.0 A/(ns*kV). Figure 2 shows the proposed waveform. The inset expands the first 5 ns of the waveform for clarity.
|Figure 3. The proposed waveform will have a derivative component, which limits high-frequency energy in the rising edge. The derivative also limits how fast the discharge current can decrease. Ref. 3|
The waveform in Figure 2 is based on a 5-kV human-to-metalESD pulse. In this case, the reference waveform for the discharge current (mathematical model) shows the peak current (Ip) at 20 A (for a 1-ns rise time). The limits for rise time (tr) will remain between 0.7 ns and 1 ns, the values in today's standard. Therefore, Dp will peak at 20 A/ns for a 5-kV discharge. Figure 3 shows the derivative of the waveform in Figure 2. You can see that the reference waveform indeed peaks at about 20 A/ns (Dp).
The proposedIEC 61000-4-2 standard will also prevent the current after the initial peak from falling too fast. The revised specification will define the ratio between Dp and the derivative of the peak's fall, called the negative derivative (Dn). Note that in Figure 3, Dn bottoms out at –5 A/ns. That makes the ratio of Dp to Dn about 4:1. According to Pommerenke, though, that spec is still open to debate.
The revised spec will also require measurements of the discharge current at 30 ns (I30) and 60 ns (I60) after the rising edge of the waveform reaches 0.1 x Ip. These measurements ensure that the discharge current doesn't take too long to decay.
The current plan for the revised standard specifies that the discharge current must decay to 2 A (30% at 30 ns) and to 1 A (30% at 60 ns) based on a 1-kV discharge. The mathematical model waveform in Figure 2 is based on a 5-kV discharge, so the waveform's values for I30 and I60 become 10 A and 5 A, respectively. In Figure 2, though, I30 equals about 7 A and I60 equals about 2.5 A. The Working Group may change the proposed values for I30 and I60 (2 A and 1 A, respectively, for a 1-kV discharge) to better match the discharge current measured in Figure 2.
The procedure for calibrating ESD simulators will likely require ESD simulator manufacturers to discharge the ESD simulator into the EUT at a given voltage five times and measure the discharge current each time. Then, the manufacturer must calculate Ip, tr, Dp, Dn, I30, and I60 from each waveform and take the average of each parameter.
Why five waveforms? Because mechanical relays used to initiate ESD pulses cause the discharge current to vary each time, and taking five sets of measurements compensates for those differences. A manufacturer will have to compare the average values of each parameter against the standard to determine if the ESD simulator complies with the new standard. It's likely that once the revised standard is approved, manufacturers will modify many of the ESD simulators on the market to comply.
For more information:
Rhoades, W., and J. Maas, "New ANSI ESD Standard Overcoming the Deficiencies of Worldwide ESD Standards," Proceedings of the 1998 IEEE International Symposium on EMC, IEEE, Piscataway, NJ. pp. 1078–1082. www.ieee.org.
Lin, D., D. Pommerenke, J. Barth, L.G. Henry, H. Hyatt, M. Hopkins, G. Senko, and D. Smith, "Metrology & Methodology of System Level ESD Testing," Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1998, ESD Association, Rome NY. pp. 29–39. www.esda.org.
Pommerenke, D., "ESD: What has been achieved, what is less well understood?" Proceedings of the International Zurich Symposium on EMC, IEEE, Piscataway, NJ, February 1999. pp. 77–82.