Relationships key to boundary-scan success
Staff- October 1, 2005
President, CEO, and
Chairman of the Board
Richardson, TX Glenn Woppman has been closely involved with boundary scan since the late 1980s. Prior to being named president and CEO in 1995, when Asset InterTech became an independent company, he was product manager for the Asset business unit within TI, where he was responsible for all business functions relating to Asset, including sales, marketing, R&D, and finance. He holds an MBA from SMU and a BSIE from the University of South Florida.
For more Q&A with Glenn Woppman on relationships, boundary-scan challenges, and the technology's evolution and future, read the continuation of this interview.
Asset InterTech began as a business unit within Texas Instruments during the early days of boundary scan, where it was responsible for developing the technology as well as the market. In 1995, the company was spun off from TI and is now celebrating its 10th anniversary.
T&MW: Why did Asset InterTech separate from TI?
Woppman: First, we needed to have relationships with other semiconductor companies, and being a business unit within TI was going to make that difficult. Second, TI went through a self-assessment and decided to become focused on DSP and analog, so it was good timing for both of us.
T&MW: Could you summarize Asset's offerings?
Woppman: Our lead product is our ScanWorks boundary-scan development environment for developing structural tests and for device programming. Complementing that, we have a services group that serves customers new to the technology who might rather have an expert develop their first boundary-scan test program. Once they are up to speed, they often move into using ScanWorks themselves.
T&MW: What differentiates Asset from other boundary-scan companies?
Woppman: Our development environment. Large, leading-edge companies pushing the envelope of technology want lots of capabilities and a rich feature set, and we provide that. But at smaller companies, you have one guy who's the board designer, but he's also doing some embedded software design, and oh, by the way, he needs to make sure he can debug and test his board. For him, a feature-rich environment is nice, but his key requirement is usability. He needs to be able to use a tool in January, put it down, and come back in July and quickly get back up to speed. We help this customer by including ease-of-use features like an intuitive GUI and our ScanWorks Assistant, and by making support instantly available over the Web. For instance, right within our user interface, he can get a 5-min video refresher on how to do an interconnect test. We track the use of these features, and we've seen activity surge as we've added more capabilities
T&MW: What's the biggest challenge limiting acceptance of boundary scan?
Woppman: The big challenge we see is really at the board-level design-for-test area. If you look at the chip-development environment, the EDA vendors—Mentor, Cadence, LogicVision, and now even Magma—all have a pretty rich set of robust, automated design-for-test tools that make it easy for designers to insert testability. But if you look at the printed-circuit-board world, the market leaders who develop schematic capture and layout tools—Mentor and Cadence dominate that market—the test tools they have don't go much beyond inserting test points. So, sometimes we'll get a board, analyze it, and find some problems—for example, the scan chain isn't properly connected to the six BGAs on the board. We can help develop workarounds for such problems, but the process would be smoother if the issues had been identified earlier.
T&MW: What are the prospects for 1149.6 AC boundary scan?
Woppman: Encouraging. LogicVision has done work on dot-6 synthesis tools, and semiconductor makers are bringing dot-6 devices to market. We added optional dot-6 support to ScanWorks about a year ago, and most of our major accounts have purchased it.
T&MW: What makes Asset InterTech unique?
Woppman: In one word, relationships.