The basics of testing op amps, part 1:
Circuits test key op-amp parameters
David Baum and Daryl Hiser, Texas Instruments- November 16, 2011
Today, three test-circuit topologies are commonly used for bench and production testing of DC parameters in operational amplifiers. These three topologies are 1) the two-operational-amplifier test loop, 2) the self-test loop, sometimes called a false-summing junction test loop, and 3) the three op-amp loop. You can use these circuits to test DC test parameters that include IQ (quiescent current), VOS (voltage offset), PSRR (power supply rejection ratio), CMRR (common-mode rejection ratio), and AOL (DC open-loop gain).
Quiescent current is the current a device draws with its output current equal to zero. Although an IQ test may seem rather simple, you must take care to ensure good results, especially when dealing with either very high or very low IQ parts. Figure 1 shows the three practical circuits that can be used to test IQ and the other parameters, but it is essential to consider any load currents. This includes feedback current in the test loop. The feedback resistor Rf actually can put a load on the part that can affect the IQ measurement.
Figure 1. These three circuits let you measure quiescent current, IQ. Click figure to enlarge.
To show you an example of these circuits, we tested the OPA369 op amp. The maximum quiescent current for this part is 1-µA per channel. The maximum input offset voltage is 750 µV. The two-amp-loop circuit in Figure 1 puts a voltage of 750.75 mV on the output of the DUT (device under test). That input voltage puts 15 µA through Rf. This current comes from the power supplies and it will add error to any measurement. Therefore, you must take steps to ensure that the output current is truly zero before making the IQ measurement.
The self-test circuit isn't the most efficient circuit for measuring very low quiescent currents because of the feedback current that the output must provide. In this implementation, the output must be adjusted to the gained-up voltage offset VOS--not always an easy task--or the 50-Ω resistor in the above schematic would need to be switched out to eliminate feedback current. The two-amp loop accomplishes the zero output requirement by adding another amplifier. By carefully choosing a low-input bias current loop amp, the output current should cause an insignificant error.
The three-op-amp loop also lets you measure IQ, but take care because of the 1-MΩ resistor at the DUT's output, which becomes an issue because it's always a parasitic load, regardless of which parameter you're measuring. If you're measuring output load current, then this resistor represents an additional load. You must also consider consider the resistor noise, which is 85 μVp-p from 0.1 Hz to 10 kHz for the 1-MΩ resistor. Using a 100-kΩ resistor would reduce the noise to 27 μVp-p. So, you can drop the resistor value to reduce noise, but then the parasitic resistor loading on the output of the DUT is more significant.
The VOS test is fundamental to the measurement of most other op amp DC specifications. Therefore, pay careful attention to the test circuit, making sure that it also works well when testing all other parameters. Poor choices in the configuration of this test can compromise the other DC measurements.
VOS is defined in different ways. A few standouts include "the differential DC input voltage required to provide zero output voltage with no input signal or source resistance," (Ref. 2) or "the differential DC input voltage require to provide zero output voltage, with no other input signal and zero resistance in either input terminal path to ground," (Ref. 3). Another definition, "the differential DC input voltage required to provide zero voltage at the output of an operational amplifier when the input bias current is zero" is an ideal theoretical method for testing the input offset voltage, which isn't practical because no op amp has zero input bias current.
The definitions suggest that you connect a low output, high accuracy, fine resolution variable voltage source to the input of the op amp and adjust the input voltage until the output voltage is zero. Then, the input offset voltage would simply be the inverse of the input voltage applied.
There are two serious problems with this method. When testing op amps with very high open-loop gain, you must make sure that the voltage source's resolution is less than a microvolt to guarantee any degree of repeatability. You must also use an iterative approach drive the output to zero. Noise in the system, coupling into the voltage source and op amp, makes the measurement and control next to impossible in a high-speed automated test environment.
Test circuits may also include a 50-Ω resistor between the noninverting input and ground for input-bias current cancellation. But, with very low input-bias-current op amps, the only real contribution of this resistor is additional noise. For a 100-pA part, the additional error without this resistor is only 0.005 µV. This cancellation only works if the bias currents are equal in direction and in magnitude.
The circuit in Figure 2 is a simplification of the self-test summing junction method in Figure 1, but without resistors R1 and R2. This circuit is also inherently stable for most op amps, which often outweighs any of the potential disadvantages and makes it the preferred test circuit.
The disadvantages of using the test circuit in Figure 2 present themselves if you choose to use it to perform additional testing. For example, the circuit in Figure 2 has implications for testing other parameters such as IQ and AOL.
This circuit, left undriven, results in a VOS error equal to (VOS * closed loop gain) * AOL in V/V. This error may be insignificant, or may be reduced by driving VOUT to 0.0 V by applying the appropriate VIN.
The equation used to compensate for the error at the output from the desired output can be adjusted using the following calculation Equation 1.
where ASJ is the summing junction gain, and ACL is the closed loop gain.
Often, an additional amplifier is used in the test loop, as shown in the two-amplifier loop in Figure 1. This configuration comes closest to meeting the definition for VOS. The DUT's output is held within the VOS of the loop amplifier to ground. You can null out the offset of the loop amplifier if it has a VOS adjustment or you can control the noninverting input to eliminate the offset. In this way, you can drive the output of the DUT to zero. The voltage measured at VOUT is 1001*VOS. Unless a load is attached to the DUT's output, the output must only supply the input bias current of the loop amplifier. This is an important consideration for low IQ parts when measuring quiescent current. In the previous two circuits, the DUT must supply the feedback current into Rf.
By connecting the noninverting input of the loop amplifier to a programmable voltage source, you can make many other op amp performance measurements such as AOL, output swing, and CMRR. As the loop control voltage is varied, the output of the DUT attempts to match the control voltage.
Note the following disadvantages of a two-amp loop:
- Additional complexity as opposed to the self-test circuit.
- Loop compensation is required because the circuit isn't inherently stable.
- The output of the DUT can be controlled only over the loop amplifier's common-mode range.
The circuit will oscillate if the loop isn't properly compensated. You can stabilize the loop by placing an appropriate capacitor in parallel with Rf. Placing an appropriate RC combination across the loop amplifier will also stabilize the loop. We will discuss compensation of this loop in a future article.
A variation on the two-amplifier loop test method is the three-amplifier loop, which uses current steering for DUT output voltage control. The compensation for this loop is set by the RC combination across the second loop amplifier. As in the two-op-amp circuit, the voltage offset of the DUT is measured at VOUT, and VOUT is 1001 times the voltage offset. This topology solves the DUT output swing limitation of the previous circuit. If greater output swings are required, the resistor in series with the loop control voltage can be made smaller.
Note the following disadvantages to the three-amplifier loop.
- Additional complexity compared to the other circuits.
- Loop compensation is required. It is not inherently stable.
- The output of the DUT always has a minimum 1-MΩ load.
Power supply rejection ratio
PSRR is the ratio of the absolute value of the change in power-supply voltages divided by an op amp's change in the input-offset voltage. Simply put, it's the op amp's ability to reject changes in the power-supply voltages over a specified range. Because you need the offset voltage to make this measurement, you can use the techniques already developed for measuring VOS. Any of the three test loops in Figure 1 will work for PSRR measurements by setting the power supplies, +VS and -VS, to the minimum supply voltage for the DUT and measuring 1001*VOS. Next, set the power supplies to the DUT's maximum voltage, then measure 1001*VOS again. Equations 2 and 3 show how to calculate PSRR.
Some op amps require additional considerations when using this method. These op amps have a low enough operating voltage that the mid-point of the power supplies (zero common mode voltage) exceeds the maximum common-mode voltage allowed for the operational amplifier in a low-power-supply configuration. Some rail-to-rail input devices have multiple input stages and operate well in this condition, but will transition to a different input stage and introduce an error in the PSRR calculation. In both types of amplifiers, a fixed common-mode voltage can prevent either the common-mode saturation or input stage transition. Keeping a constant common-mode voltage for both measurements of the PSRR test will result in an error that cancels during the calculation of PSRR. The actual common-mode voltage needed for these devices will vary depending on the topology of the amplifier's input stage.
Common-mode rejection ratio
CMRR is the ratio of the differential voltage gain to the common-mode voltage gain. That is, it's the op amp's ability to reject common-mode voltages over a specified range. Because you need the offset voltage to make this measurement, you can use techniques already developed for measuring VOS to measure CMRR.
You may want to make all measurements with respect to ground. To do that, tie the noninverting input to ground and move the power supplies in a tracking fashion, positively or negatively, to apply effective common-mode voltages to the amplifier. The output must be driven to the midpoint of the supplies to eliminate any AOL errors that corrupt the CMRR measurement. Equations 4 and 5 show how to calculate CMRR.
DC open loop gain
AOL is the ratio of the output voltage to the differential input voltage. The measurement involves measuring the input offset voltage at several points and calculating AOL.
The procedure for measuring AOL requires some knowledge of the DUT op amp's output behavior. Ideally, an op amp could swing all the way to both power supply rails. This is not usually the case. AOL will be specified at some distance from the rails at a given load.
Assume that the output can swing from VOUT (positive) to VOUT (negative). If you drive the output to VOUT (positive), the voltage on the input of the DUT will be VOS + VIN (positive). The extra voltage VIN (positive) is required to drive the output to VOUT (positive). Conversely, if you drive the output to VOUT (negative), the voltage on the input of the DUT will change to be VOS + VIN (negative). You need to measure that change on the input to achieve the desired full-scale output.
The method to measure AOL using Figure 1 is:
1. Connect the appropriate load to the DUT.
2. Force VIN to set VOUT (positive) to the product data sheet specification for positive swing.
3. Measure V(1), which is: 1001*(VOS + VIN (positive))
4. Then, force VIN to set VOUT (negative) to the product data sheet specification for negative swing.
5. Measure V(2), which is: 1001 * (VOS + VIN (negative))
7. Substitute the values measured for VIN (positive) and VIN (negative).
8. Note that VOS drops out of the equation.
In a future article, we'll cover input bias-current testing and sources of errors to consider when designing and testing op amps. We'll provide a test circuit that you can use to combine the self-test circuit and two-amplifier loop to take advantage of both test methods. A third article will cover compensation issues because the two amplifier loop will oscillate if not properly compensated. T&MW
- Lewis, Don, "Testing Operational Amplifiers," Electronic Test, January 1979, pp. 76-82.
- Graeme, Jerald G., Tobey, Gene E., Huelsman, Lawrence P., Operational Amplifiers, Design and Applications, McGraw Hill Book Company, New York, 1971 p. 454.
- Wait, John V., Huelsman, Lawrence P., Korn, Granino A., Introduction to Operational Amplifier Theory and Applications, McGraw Hill Book Company, New York, 1975, p. 101.
For further reading
National Semiconductor published test methods for operational amplifiers in their Linear Edge magazine (Christensen, John, "Op Amp Test Circuits," Linear Edge, Issue # 7, Summer 1993, Pages 14 - 16. Christensen, John, "Op Amp Test Circuits - Part II," Linear Edge, Issue # 8, Winter 1994, Pages 15-19).
David R. Baum is a design engineer with MGTS at Texas Instruments where he develops product designs for LCD and AMOLED TVs. David has more than 27 years of analog experience and has at least seven patents to his credit. He received his BSEE with distinction, an MBA, and an MA in German Literature from the University of Arizona, Tucson, Arizona. E-mail email@example.com.
Daryl Hiser is a senior test engineer with TI's precision op amps group where he is responsible for developing and implementing test and characterization for new products and he has two patents to his credit. He received his BS in Zoology from Northern Arizona University, Flagstaff, Arizona. E-mail firstname.lastname@example.org.