Reduce power consumption in portable test instruments
The core of many fast instruments is a high speed ADC (analog to digital converter). For example, non-destructive testing of metal objects uses an imaging technique similar to medical ultrasound, where a digital image sensor feeds a high-speed ADC. In some cases there are a great many channels, so the size and power consumption are key. Portable instruments obviously need to conserve battery power, but even fixed installations are power conscious – whether for “green” initiatives or simply to minimize heat dissipation in compact form factors. The trend in ADCs is to move to smaller process geometries and use 1.8 V power supplies to reduce the power. Clever ADC design is required to achieve the same or better performance as similar 3V devices.
Using low-power ADCs in instrument designs can reduce consumption and improve battery life. The LTC2195 family provides 12-bit, 14-bit, and 16-bit ADCs at sample rates up to 125 Msamples/s at very low power levels. Without eliminating functions or increasing the front-end amplifier requirements, the new devices dramatically reduce power consumption. By providing a choice of single, dual, quad and octal ADCs, customers can achieve high channel density while minimizing heat dissipation. The ADC is, however, only part of the chain. The entire signal chain must be well matched for the instrument to be successful.
Matched Signal Path Design
You can use the LTC2195 family for applications that require 16-bit performance and ultralow power consumption to extend battery life such as portable instrumentation. In many applications, you must condition the signal from the sensor before an ADC can sample it. For this task, it is important to choose a low noise, low power amplifier that matches the performance of the ADC, such as the LTC6406, which makes a good match for the LTC2195 family.
Typically the output of a digital sensor is single-ended. This requires a single-ended to differential translation before being sampled by the ADC. If response to DC is also required, a transformer cannot be used. This situation mandates a low noise amplifier that is capable of doing single-ended to differential translation.
Differential amplifiers such as the LTC6406, with low noise (1.6nV/√Hz at the input) and high linearity (+44dBm OIP3 at 20MHz) are part of the signal chain. External resistors set the gain, giving the user maximum design flexibility. Low power consumption (59mW with a 3.3V supply) minimizes the effect on the system power budget. This amplifier also has a common mode voltage range that extends down to 0.5V, meaning it can be paired seamlessly with the LTC2195, which has a nominal common mode voltage of 0.9V.
The amplifier must be followed by a filter to reduce the wideband noise of the amplifier and to isolate the output of the amplifier from the ADC inputs—the ADC inputs produce common-mode glitches associated with the commutation of the sample caps. A filter helps attenuate these glitches, protecting the amplifier. A high order filter is not required, since the noise of the amplifier is fairly low. With a corner frequency of 12 MHz, the filter used here is adequate—it won’t degrade ADC’s performance.
The final filter should be designed to reduce only the wideband noise of the amplifier, not as a selectivity filter with a steep transition band. A steep transition band in the filter increases insertion loss and degrades the OIP3 of the amplifier, which leads to distortion of the signal from the sensor. The circuit shown in Figure 1 accomplishes this goal.
The ADC used is the LTC2195, a 16-bit 125Msps, simultaneous sampling, dual ADC operating from a single 1.8V supply. At 216 mW per channel, this device achieves nearly identical SNR performance as ADCs drawing 1.25W. The LVDS serial interface allows the part to consume less than half the board space of preceding ADCs and also allows the use of smaller FPGAs due to the reduced number of I/O. Combined with the LTC6406, this circuit consumes only 275mW – an obvious advantage for multichannel systems. This circuit can be easily applied to the 14- or 12-bit members of the family or to converters that sample at much lower sample rates, further saving power. Figure 1 shows the circuit design.
Figure 1. Single-ended to differential interface to high speed ADC needs a differential amplifier and a low-pass filter network.
Figure 2 shows the performance of this circuit. The results show that the linearity of the amplifier does not degrade the SFDR (spurious free dynamic range) of the ADC at low input frequencies. The SNR also remains unchanged at 76.5dB. The LTC6406 does not degrade the SNR or the SFDR of the LTC2195 when using it at unity gain.
Figure 2. FFT results of circuit in Figure 1 with FS = 125 Msamples/s and FIN = 1 MHz show low noise and no harmonics.
The trend toward “green” instruments and test equipment is inescapable, whether for fixed installations or portable equipment. As performance levels increase and power consumption requirements decrease, it is important to match the components of the entire signal chain. For 16-bit performance, the LTC2195 is the perfect ADC for power-conscious, high resolution sensor applications, whereas the LTC6406 is a good match as a driver amplifier—it does not compromise the performance of the LTC2195 and its power requirements are also low. Data sheet performance of the ADC can be easily achieved by using a relatively low-order filter to reduce the wideband noise of the amplifier. The pairing of components such as the LTC2195 and the LTC6406 let you design low-noise, low power interfaces for portable image sensors, combining excellent performance with low power consumption.