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Understand and test 10G Thunderbolt technology

Chris Loberg, Tektronix- July 20, 2012

Thunderbolt (previously called Light Peak) is a new peripheral-connection technology, developed by Intel with collaboration from Apple, that combines data, video, audio, and power in a single serial connection. Based on the PCI Express and DisplayPort architectures, Thunderbolt allows for high-speed connection of peripherals such as hard drives, RAID arrays, video-capture solutions, and network interfaces, and it can transmit high-definition video using the DisplayPort protocol. Each Thunderbolt port also provides up to 12 watts of power to connected peripherals.

Introduced more than a year ago, Thunderbolt features two bi-directional 10.3125 Gbps links on a single electrical or optical cable using the same connector as a Mini DisplayPort. The main advantage is a significant performance boost over FireWire 800, USB 3.0 or even eSATA, as shown in Figure 1. It provides sufficient bandwidth to daisy-chain multiple high-speed devices without using a hub or a switch and offers low latency for highly accurate time synchronization.


Figure 1 – Thunderbolt significantly speeds up data transfer rates for peripheral devices.

Unlike industry standards that often involve long-drawn out committee sessions, Thunderbolt was the result of a close-knit effort by Intel and Apple along with a number of partner companies from across the industry.  At this point, Thunderbolt is more of an interconnect technology that incorporates elements of the PCIe and DisplayPort than a true standard.  But it doesn’t appear that the lack of formal standards body will keep Thunderbolt from gaining widespread adoption.

Thunderbolt ports first appeared on Apple’s Macintosh computers and are just now showing up on motherboards from MSI, ASUS and others. By the end of 2012, Intel expects about 100 peripherals based on Thunderbolt connector technology will be commercially available, with the number climbing steadily throughout 2013.  Thunderbolt is also being integrated on third-generation Intel Core processors code-name Ivy Bridge, reducing the need for a discrete chip to implement the technology.

From a design perspective, Thunderbolt offers the freedom to innovate new PC products and configurations. It gives engineers the ability to move high-performance expansion technologies outside the PC box or downsize laptops without sacrificing I/O performance.  It can also co-exist with other I/O technologies through the use of PCI Express adapters and drivers.

For Thunderbolt to truly gain broad adoption, a strong ecosystem with full test and measurement support will be an important ingredient.  Plugfests along with verification and compliance testing will help ensure that products incorporating Thunderbolt technology deliver expected performance and smoothly interoperate with each other.  Let’s take a closer look at what’s involved with testing Thunderbolt designs.

Specification overview
For designers used to working with high-speed serial buses, much of what’s in Thunderbolt will look familiar. Thunderbolt signaling is a dual NRZ (64/66b encoded) at 10.3125 Gbps (same as SFP+) with two differential Tx pairs and two differential Rx pairs.  As the overview of Thunderbolt electrical validation shown in Figure 2 illustrates, Thunderbolt relies heavily on DisplayPort testing. This is in part due to the use of the Mini DisplayPort connector and the native support for downstream DisplayPort devices as well as dual mode DisplayPort (DP++) for driving single-link HDMI and DVI signals Storage drive interfaces will require conformance to other technologies such as SATA. This means that if you are preparing a lab for Thunderbolt testing you should plan on being prepared to test a variety of other high-speed serial data standards as well.



Figure 2. Thunderbolt electrical validation ecosystem

Since the Thunderbolt spec is currently in transition from a 0.6 version it should be noted that the current measurement list shown in Table 1 is likely to grow or change as the specification reaches its final 1.0 version. Today this table constitutes the full extent of the physical layer validation requirements.   


Table 1. Current Thunderbolt measurement summary

On the Tx side, the specification calls for three patterns. These include 8 1s and 8 0s on a low frequency square wave, PRBS-9 and PRBS-31 patterns. The channel measurements will be performed with a TDNA solution using methodologies first developed for SATA that involve return loss measurements into active transmitters. For receiver testing, most tests will be BERT based and represent a fairly light level of signal impairment. For instance, the ISI (DDJ) contributions called for with Thunderbolt are a fraction of that used in DisplayPort HBR2. The resulting eye diagram is very open and easy to generate.  On the other hand, crosstalk is expected to be a bigger issue with the higher data rate. Real world testing of crosstalk involves receiver BER verification while actively sending data out the transmitter thus accounting for near-end crosstalk. The spec also calls for receiver compliance testing to be performed at 3, 4.8 and 100 MHz. 

Continue reading page two (on EDN.com).