DesignCon Preview: What’s going on in test?
Janine Love- January 22, 2013Still planning your schedule for DesignCon next week? I asked around to see what some companies were highlighting at this year’s conference/expo. Here are some details for you …
Rohde & Schwarz
Rohde & Schwarz will offer free technical sessions on common design and test challenges, and tips for solving these challenges. Each session will have a corresponding demonstration station at Rohde & Schwarz's booth (#701) for participants to learn even more about specific solutions.
- Ensuring signal integrity through True Differential S-parameters measurements for differential structures such as backplanes and cables even in the presence of non-linear elements
- Understanding the jitter performance of clock signals by measuring phase noise, the most sensitive and accurate measurement of the performance of precision clocks
- Test requirements for USB 2.0 compliance including signal integrity and low-level protocol tests (see Figure)
- How to debug embedded systems with tightly time synchronized digital, analog and RF signals
Technical sessions will run from 8:30am to 5:00pm on Tuesday, January 29 in Mission City Ballroom M3.
NI suggests that you “visit the National Instruments (NI) booth #707 to see how engineers should think beyond their current tools for design and test. Here, you’ll learn how NI and AWR, using PXI modular hardware and NI LabVIEW system design software, can make you more productive with increased connectivity between design, validation and production test.”
Demos will showcase:
- Measurements in the RF design flow that correlate real world measurements and simulation data using NI LabVIEW and AWR tools
- An offering of an easy-to-learn environment from schematic capture, to simulation to PCB prototype with NI Multisim software
- The Best in Test nominated NI PXIe-5644R vector signal transceiver, showing how FPGA technology is revolutionizing how engineers are performing RF measurements
Learn from NI Business and Technology Fellow Mike Santori how the evolution in instrumentation continues today and how today’s products require new approaches to test and instrumentation. Be challenged to look at test with the same eye toward innovation as you do for the products you are designing. NI is also offering a variety of sessions that share best practices and knowledge of how the latest technologies can be used for design and test applications.
Keynote: Software-Designed Instrumentation Enables New Approaches for Test (and Design)
Mike Santori - Business and Technology Fellow - National Instruments
Wednesday, January 30
12:00pm - 12:30pm
Modeling High-Speed Interconnect for the Signal Integrity Engineer: Tips, Tricks, and Trade-Offs
Monday, January 28, 2013
9:00 AM - 12:00 PM
Mixed RF-Digital Design-to-Prototype Framework for Power Amplifier Digital Predistortion
Tuesday, January 29, 2013
10:15 AM - 10:55 AM
Modeling, Simulation, and Implementation of High-Power Inverter Plants and FPGA-Based Controllers
Tuesday, January 29, 2013
11:05 AM - 11:45 AM
Open FPGA Architectures for Accelerating Protocol-Aware ATE
Tuesday, January 29, 2013
10:15 AM - 10:55 AM
Tektronix: “See the World through Closed Eyes at DesignCon 2013”
As the datacom and computing industries move into serial communications at speeds beyond 10 Gb/s, designers face new challenges making signal integrity measurements with “closed eyes.” Tektronix will be showing advanced embedding and de-embedding techniques in booth 309 for 10 Gb/s and faster serial bus designs, effectively allowing designers to see the world through closed eyes.
New product announcements and capabilities will include product demonstrations on future PCI Express Gen 4 technology, 100G tests for BER and jitter/eye diagrams, DDR4 memory verification, and serial data link analysis. Attendees at the exhibit will be eligible to win a new Tektronix Mixed Signal Oscilloscope.
The world’s leader in oscilloscopes will also be sharing its technical knowledge at DesignCon in a number of sessions including a tutorial at 9 a.m. on Monday Jan. 28 by Tektronix engineer Josiah Bartlett titled “Methods of Improving 3D EM Model Development and Associated Time/Frequency-Domain Measurements.” Other sessions include an interactive jitter panel chaired by Tektronix' Chris Loberg on Monday starting at 4:45 p.m. and the presentation of a technical paper by Tektronix engineer John Pickerd at 9:30 a.m. on Tuesday Jan. 29 on analysis and validation of complex serial bus links.
As the host sponsor of this year’s event, Agilent will demonstrate its:
- Power and USB oscilloscope test solutions, including its new high resolution Infiniium DSO9000H Oscilloscope, next-generation, high resolution InfiniiVision MSO4000A Oscilloscope, and N2820A High Dynamic Range Current Probe.
- SystemVue and ADS Channel Simulator to build and run electrical and opto repeater models.
- New N5990A test automation software that expands support for its M8190A arbitrary waveform generator to support the upcoming HDMI 2.0 specification release.
- N1930B Physical Layer Test System (PLTS) 2013 Software with powerful new enhancements such as faster simulation and advanced equalization techniques.
- Comprehensive Signal Integrity Measurement Solution, E5071C-TDR, offering hot TDR measurements of active devices and stressed eye diagram analysis of interconnects.
- Sampling oscilloscope solutions featuring the 86100D Infiniium DCA-X wide-bandwidth oscilloscope mainframe capable of making the Cloud work with a BER test solution up to 32 GB/s.
- High Performance Logic Analyzer, U4154A, and PCI Express Gen3 Protocol Analyzer & Exerciser, U4301A.
Agilent is also hosting two educational forums, as well as, several tutorials and technical paper sessions. (For more information or to view the complete schedule of Agilent events, visit http://www.agilent.com/find/DesignCon.) The educational forum topics are:
- “Challenges and solutions in characterizing a 10Gb device” – Learn how to setup your test equipment to optimize jitter measurement accuracy focusing on obtaining good correlation between sampling and real-time oscilloscopes.
- “Making DDR4 work for you” – Learn about the challenges with DDR4 designs compared to DDR3 and understand the most sensitive parameters of the channel that need special design attention.
- “Tips and Advanced Techniques for Characterizing a 28 Gbps Transceiver”;
- “Comparison and Contrast of State-of-the-Art Time Domain Reflectometry Measurement Instruments”;
- “Understanding Digital Communication Standards: A Look Under The Hood”;
- “Enabling the next generation of smartphones and tablets with UFS – An industry perspective”;
According to Teledyne LeCroy, a Diamond Sponsor of the DesignCon 2013 exposition, the company "will premiere an array of innovative products and technologies, demonstrating continued leadership in the speed, performance and analysis capabilities of oscilloscopes and signal integrity test solutions."
Demos and discussions at booth 209:
- 65 GHz LabMaster, World’s Highest Bandwidth Oscilloscope - 60 GS/s; 14.1 Gb/s Serial Trigger, ChannelSync 80 Channels
- Multilane Analysis—Four Lane Eye, Jitter, Noise & Crosstalk Analysis • De-embed, Emulate, Equalize and Virtual Probing
- 2 to 12 Port SPARQ Signal Integrity Network Analyzer
- PCI Express® 3.0 Link Equalization Testing, Dynamic Equalization Test Arcs, and Full Compliance Testing
- DDR, LPDDR, SAS, SATA, PCI Express, USB, DisplayPort
- HDO 12-bit High Definition Oscilloscopes—16x More Resolution, HD4096 High Definition Technology
- Largest Selection of Protocol Solutions—Full System Validation; Multi Protocol Analysis; Cross Synchronization
- PCI Express 3.0 Multi-lead Probe
- NVMe SSD Decode Support
Teledyne LeCroy technical presentations:
- PCI Express 3.0 Characterization, Compliance, and Debug for Signal Integrity Engineers , Monday, January 28, 3:00PM - 4:30PM
- Case of the Closed Eye: A Growing 100G Dilemma, Monday, January 28, 4:45PM - 6:00PM
- Speed Training: A Potpourri of SI Puzzlers, Tuesday, January 29, 1:00PM - 1:40PM
- A Fast and Inexpensive Method for PCB Trace Characterization in Production Environments , Tuesday, January 29, 2:50PM - 3:30PM
- Dramatic Noise Reduction Using Guard Traces with Optimized Shorting Vias , Wednesday, January 30, 9:20AM - 10:00AM
- Which One Is Better? Comparing Options to Describe Frequency Dependent Losses , Wednesday, January 30, 11:05AM - 11:45AM
- Ask the Experts, …Anything Goes , Wednesday, January 30, 1:00PM - 1:40PM
- Understanding Apparent Increasing Random Jitter with Increasing PRBS Test Pattern Lengths , Wednesday, January 30, 2:50PM - 3:30PM
Debugging to Find the Root Cause of Compliance, Limit or Mask Test Violations, Wednesday, January 30, 3:00PM - 4:30PM
For details visit us on-line: http://teledynelecroy.com/designcon/