Software checks PCBs against EMC design rules
Test & Measurement World Staff - September 17, 2012
Design engineers can use Computer Simulation Technology’s Boardcheck to analyze electromagnetic-compatibility (EMC) and signal-integrity (SI) design rules to get a quick overview of potential problems in their PCB layouts. CST Boardcheck supports a multitude of layout formats, including Cadence Allegro, Zuken CR 5000, Mentor Graphics Expedition, and ODB++, which are read in using CST Studio Suite import filters.
Once imported, engineers can easily check nets critical to the design against a number of individually selectable, industry-established design rules in order to ensure the EMC and SI of the design. EMC rules include net reference, wiring, crosstalk, decoupling, and placement. SI rules include net integrity and via integrity. CST Boardcheck also generates a report listing all violations and enables users to highlight the corresponding problematic portions of the design.
Computer Simulation Technology, www.cst.com/content/products/cst-boardcheck/default.aspx