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BERT handles PCIe 3.0 SKP ordered-set adjustments

Staff - January 30, 2013

With J-BERT software revision 7.40, the Agilent PCIe 3.0 receiver-characterization platform enables the testing of receiver designs that adjust the length of the 128b/130b encoded filler symbols—also known as SKP ordered sets—as needed for clock compensation. Using the test set, design and test engineers in the semiconductor and computer industry can accurately characterize and verify standard compliance of PCIe receiver ports in ASICs, add-in cards, and motherboards.

The J-BERT N4903B serial BERT outfitted with the revised test software enables receiver testing in cases where the SKP ordered-set length is changed by the DUT in loopback mode. The J-BERT error detector can now ignore SKP ordered sets when counting errors, even when they deviate from the original length sent out by the pattern generator. When engineers debug their designs, they can monitor SKP ordered-set counters in the error detector.

Agilent’s receiver test platform comprises the J-BERT N4903B serial BERT, the N4916B de-emphasis signal converter, N4915A-014 PCIe 3.0-compliant calibration channels, the 81150A or 81160A pulse function arbitrary noise generator, an Infiniium 90000 or 90000 X-Series oscilloscope, and N5990A-101 and N5990A-301 test automation and link training software. For motherboard testing, the N4880A reference clock multiplier is available.

J-BERT software revision 7.40 is available as a free download at www.agilent.com/find/jbert. To use PCIe 3.0 SKP ordered-set handling, the N4903B J-BERT must have SER/FER analysis option N4903B-A02/UA2 installed.

J-BERT N4903B serial BERT datasheet

Agilent Technologies, www.agilent.com

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